Silicon Photonic Integrated Circuits (PICs) offer multiple advantages, including high-density integration scalability, cost-effectiveness in large volume production, and high yield manufacturing due to mature CMOS microelectronics processes. They find applications in optical field-programmable gate arrays, energy-efficient optical signal processors, and handheld optical sensing systems. This presentation reviews recent progress in integrated coherent networks on the silicon photonics platform, exploring their applications in reconfigurable processors, optical communications, and optical sensing. Innovative computation units based on Micro-ring resonators are introduced, enabling efficient optical delay lines and pulse shaping. Coherent networks also facilitate mode unscrambling in high-capacity optical communication systems and improve resolution and bandwidth in on-chip speckle spectrometers.

We demonstrated a femtosecond-precision clock distribution network (CDN) by injecting photocurrent pulses extracted from an optical frequency comb source into a driverless CDN in CMOS chips. Low-jitter and sharp-edged photocurrent pulses directly drive capacitive metal-mesh structure in a CMOS chip thus generating GHz-clock signal in the voltage domain. Femtosecond-level on-chip jitter and skew have been accomplished in conjunction with ultralow comb-jitter and clock-driverless structure. The inter-domain skew has been compensated in the optical paths by monitoring them with on-chip time-to-digital converter (TDC). When compared to conventional H-tree CDN, reduction of on-chip heat dissipation was observed.

Advancements in communication and quantum computing have led to the need for efficient quantum networks. Superconducting qubits are vital for quantum computation and require converting microwave states to optical states for long-distance communication. However, current coupling techniques suffer from high photon loss and scattering, hindering their efficiency. A fiber-to-chip coupler (FCC) is essential to achieve high coupling efficiency. To address this, a novel high refractive index lens (1.85 refractive index at 1550 nm) imprinted on a fiber end facet is proposed, enabling efficient light coupling to a waveguide. This approach allows shorter wavelengths due to the operation of the lens in the bonding medium, resulting in superior coupling efficiency. The new method aims to develop a robust packaging process for quantum communication networks that can operate at the millikelvin level.

A chip-scale PIC packaging approach is presented for high-frequency devices. The PIC is attached with a multilayer ceramic interposer and the active devices are hermetically sealed in between the PIC and the interposer. The ceramic interposer part provides high-bandwidth RF lines and integration of the electronic ICs and passives, whereas the active photonic chips can be mounted on the PIC and a fiber array attached for the optical interface. The co-packaging approach was optimized and demonstrated for 3-µm SOI PIC platform integrated with low-temperature co-fired ceramics (LTCC) interposers.

Plug and play fiber coupling at the wafer-scale is highly relevant to interconnect photonic integrated circuits (PICs), switches and multiplexer for short to long range communication, as well as chiplets in new chip design with optical interconnects. A new solution is presented being compact, low-loss, and in plane, adaptable to a wide range of fibers. It is based on beam-shaping reflecting elements monolithically fabricated with integrated comp like fiber alignment structures. Successful assembly of a 12-fiber ribbon is demonstrated with excess losses as low as 0.35 dB. The processes and methods are highly homogeneous and scalable.

We propose a novel graded-index plastic optical fiber (GI POF) link that enables stable high-speed data transmission without the requirement for conventional coupling techniques to reduce reflection at fiber connection, as typified by physical-contact (PC) fiber connection. The stability is attributed to the reduction in noise caused by reflection at the fiber connection through strong mode coupling in the fiber. The novel GI POF link will be advantageous for optical interconnects in household and automotive applications, in which PC connection is not ideal to apply. It will also be invaluable for multi-fiber interconnects based on multi-fiber connectors for data center applications, in which complete PC connections are difficult to obtain.

The miniaturization of photonic integrated systems requires new monolithically integrated components and micro-fabrication technologies able to guarantee high resolution and to enable a wide and cost-effective deployment. Laser-based glass micro-machining allows writing 3D waveguides within the bulk of the glass, which can be used as photonic wire connections within photonic integrated circuits or their package and assembly components to guarantee effective fiber-chip or chip-to-chip connectivity. In this article, we present low-loss fused silica waveguides and their performance in terms of mode field diameter (MFD) as well as insertion, propagation and bending losses at different wavelengths in the telecom NIR windows. For a comprehensive analysis, a comparison with state-of-the-art waveguides fabricated either in fused silica or in borofloat 33 is provided. Specific examples of tapers, mode field converters, or fan-in/-out devices are presented to fully demonstrate the potential of our laser-based micro-machined low-loss silica waveguides for packaging and assembly applications in integrated photonics.

This talk reviews the advantages of low loss silicon nitride photonic integrated circuits. We will present the LIGENTEC offering for low loss SiN PICs for application such as quantum optics, optical computing and telecommunication. Progress on integration of active materials to the low loss platform, such as InP and LNOI are discussed. Integration of actives such as InP reduces the laser linewidth and enables narrow linewidth tunable lasers. The talk reviews the fabrication offering of fast R&D cycles in low volume PIC fabrication though multi-project wafer runs to high volume PIC fabrication in an automotive qualified CMOS line.

This conference presentation was prepared for SPIE Photonics West, 2024.

Optical frequency comb (OFC) sources have attracted significant attentions over the past few years. Silicon based semiconductor mode-locked lasers (MLLs) can provide coherent optical frequency combs with high repetition rates and output power, which have been recognized as potential multi-wavelength sources for optical I/O due to their compactness, high-efficiency, and low-cost properties. Here, we demonstrated monolithically grown III-V quantum dot lasers on SOI substrates for integrated optical I/O with transmission capcity over 1.6 Tbps.

Silicon Photonics has emerged as the leading technology platform for high-speed, high density, and low power optical interconnects addressing hyperscale datacenter, high-performance computing, mobile and enterprise applications. Advanced 3D integration using through silicon vías (TSVs) for low parasitic interconnection and power delivery, along with high throughput, submicron waveguide to optical fiber attachment and laser integration will be essential to enable higher data rate per lane interconnects in Tbps optical transceivers on the horizon. In this paper, we will review trends in photonics packaging architecture for scale up and scale out of optical interconnects, critical technology challenges and path to technology adoption for high volume productization.

The demand for high-bandwidth interconnects in applications such as data centers and high-performance computing has led to the widespread adoption of optical interconnect solutions. To further enhance the market acceptance of these applications, cost reduction is essential. For this, we realized an avalanche photodetector (APD) that relies on the vertical N+/P-well Si junction for photodetection. It achieves the responsivity of 0.28 A/W and the bandwidth of 5.9 GHz for 0 dBm incident optical power. We implemented a monolithically integrated optical receiver that contains APD, under-damped trans-impedance amplifier, and output buffers using 28-nm standard CMOS technology without any process modification and design rule violation. The fabricated optical receiver successfully operates up to 20 Gb/s. Details of the monolithic optical receiver performance as well as the limiting factors that need to be overcome for further performance improvement will be discussed in the presentation.

A photonic engine for the integration of multi-lane optical transceivers is presented. The building blocks are InP-based electro-absorption modulated lasers and photodiodes capable of operating at 50 GBaud with PAM-4 modulation, and a low-cost polymer waveguiding chip providing routing of the multiple lanes and connectivity towards standard single-mode fibers. An automatic process for the hybrid assembly of the different building blocks has been developed, and photonic integrated circuits with up to 16 lanes have been demonstrated. Furthermore, high-frequency flexible interconnects with bandwidths beyond 100 GHz provide a connectivity solution between photonics and high-speed electronics.

We propose an experimental demonstration of a silicon-based neuromorphic computing scheme with optical interconnects. The device consists of 4-channel input grating coupler arrays to guide 1550 nm light through the waveguide, tunable Mach-Zehnder Interferometer (MZI) mesh for matrix-vector multiplication, micro-ring resonator (MRR)-based MZI to implement nonlinear activation function, and 4-channel radiator array for free-space radiation. Depending on the different input information (i.e., image, voice, text, etc.), the radiated beam is focused in different directions to perform the classification task. Our proposed on-chip optical computing scheme can pave the way for future AIs, providing a small footprint, high-speed, cost-effective, and power-efficient.