The integration of photonics and electronics on a converged silicon CMOS platform is a long pursuit goal for both academe and industry. We have been developing technologies that can integrate III-V compound semiconductors and CMOS circuits on 200 mm silicon wafers. As an example we present our work on the integration of InGaP light-emitting diodes (LEDs) with CMOS. The InGaP LEDs were epitaxially grown on high-quality GaAs and Ge buffers on 200 mm (100) silicon wafers in a MOCVD reactor. Strain engineering was applied to control the wafer bow that is induced by the mismatch of coefficients of thermal expansion between III-V films and silicon substrate. Wafer bonding was used to transfer the foundry-made silicon CMOS wafers to the InGaP LED wafers. Process trenches were opened on the CMOS layer to expose the underneath III-V device layers for LED processing. We show the issues encountered in the 200 mm processing and the methods we have been developing to overcome the problems.
Bing Wang, Kwang Hong Lee, Cong Wang, Yue Wang, Riko I. Made, Wardhana Aji Sasangka, Viet Cuong Nguyen, Kenneth Eng Kian Lee, Chuan Seng Tan, Soon Fatt Yoon, Eugene A. Fitzgerald, and Jurgen Michel, "The integration of InGaP LEDs with CMOS on 200 mm silicon wafers," Proc. SPIE 10107, Smart Photonic and Optoelectronic Integrated Circuits XIX, 101070Y (Presented at SPIE OPTO: February 02, 2017; Published: 20 February 2017); https://doi.org/10.1117/12.2252030.
Conference Presentations are recordings of oral presentations given at SPIE conferences and published as part of the conference proceedings. They include the speaker's narration along with a video recording of the presentation slides and animations. Many conference presentations also include full-text papers. Search and browse our growing collection of more than 14,000 conference presentations, including many plenary and keynote presentations.