As technology node shrinks down, hotspots, i.e. patterning failures on wafer after etching process, become an inevitable
problem. The main cause of such hotspots is low contrast of aerial image. There are several methods that can improve
aerial image contrast such as SRAF insertion and OPC. However, it is difficult to fix all hotspots by applying only SRAF
and OPC in advanced technology node. This paper proposes a new post-layout optimization method, before SRAF and
OPC, based on SOCS kernel for improving aerial image contrast and reducing hotspots. Experimental results show average
4nm PV-band improvement, as a result of contrast improvement.
Taiki Kimura, Tetsuaki Matsunawa, Shigeki Nojima, and David Z. Pan, "SOCS based post-layout optimization for multiple patterns with light interference prediction," Proc. SPIE 10148, Design-Process-Technology Co-optimization for Manufacturability XI, 101480A (Presented at SPIE Advanced Lithography: March 01, 2017; Published: 30 March 2017); https://doi.org/10.1117/12.2260091.
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