Optical/Digital pattern recognition and tracking based on optical/digital correlation are a well-known
techniques to detect, identify and localize a target object in a scene. Despite the limited
number of treatments required by the correlation scheme, computational time and resources
are relatively high. The most computational intensive treatment required by the correlation is
the transformation from spatial to spectral domain and then from spectral to spatial domain.
Furthermore, these transformations are used on optical/digital encryption schemes like the
double random phase encryption (DRPE). In this paper, we present a VLSI architecture for
the correlation scheme based on the fast Fourier transform (FFT). One interesting feature of
the proposed scheme is its ability to stream image processing in order to perform correlation
for video sequences. A trade-off between the hardware consumption and the robustness of the
correlation can be made in order to understand the limitations of the correlation
implementation in reconfigurable and portable platforms. Experimental results obtained from
HDL simulations and FPGA prototype have demonstrated the advantages of the proposed
Maher Jridi and Ayman Alfalou, "FPGA design of correlation-based pattern recognition," Proc. SPIE 10203, Pattern Recognition and Tracking XXVIII, 102030N (Presented at SPIE Defense + Security: April 13, 2017; Published: 1 May 2017); https://doi.org/10.1117/12.2264715.
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