Throughout this report, we demonstrate the benefits of lithography simulation for the fabrication of the photonic devices using a rigorous verification flow. In our case, we report the application rigorous lithography simulation to predict the fabrication imperfections of silicon photonic devices during the lithography process. Resist calibration has been performed, with both FEM CD and resist profile simulation results matching well with the wafer results for the design rule patterns. SEM overlay proves that the simulation contours agree with the wafer images for the design rule test patterns.
Conference Presentations are recordings of oral presentations given at SPIE conferences and published as part of the proceedings. They include the speaker's narration with video of the slides and animations. Most include full-text papers. Interactive, searchable transcripts and closed captioning are now available for 2018 presentations, with transcripts for prior recordings added daily.
Search our growing collection of more than 16,000 conference presentations, including many plenaries and keynotes.