Due to ever increasing demand for information bandwidth, and with electronics approaching their performance limit, there has been a renewed interest in using optical logic for computing and signal processing over the past decade. System advantages that the optical schemes promise over the conventional electrical schemes including but not limited to: significant reduction of gate latency, ultra-low energy consumption, and simplified layout architecture. For example, adding is the fundamental operation for computation. However, though it has a concise layout, a conventional electrical carry-ripple adder will be too slow for many-bit addition due to excessive carry propagation delay. Thus, modern microprocessors all have to use much more complicated structures such as parallel prefix adders to obtain satisfactory performance while they come with inevitable power penalty. The greater the number of bits, the more complex and power hungry the adder will become. In this paper, we propose a silicon photonics based architecture of carry-ripple adder, which utilizes the particular merit of light that interference, for future high-speed and low-power consumption optical computing. In our proposed carry-ripple adder, the critical path will be built with optical switch and optical signals will be modulated to carry information. As all of the optical switches could operate simultaneously, the unpleasant accumulated gate latency from the electrical approach will be removed. Silicon photonic based optical switches are promising candidates to implement the adder due to their compact sizes, which could significantly reduce the capacitances and energy-consumption.
Zheng Wang, Zhoufeng Ying, Shounak Dhar, Zheng Zhao, David Z. Pan, and Ray T. Chen, "Silicon-photonics-based carry-ripple adder towards future optical computing (Conference Presentation)," Proc. SPIE 10537, Silicon Photonics XIII, 105370E (Presented at SPIE OPTO: January 30, 2018; Published: 14 March 2018); https://doi.org/10.1117/12.2288748.5751508511001.
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