Due to the bottleneck in the continuation of Moore’s law as well as the drastically increasing trend of bandwidth, silicon photonics has emerged as the most promising candidate for implementing next-generation communication networks with ultralow power and ultrahigh speed. Recently, optical computing in integrated photonics, which outperforms electrical counterparts both in power consumption and bandwidth, has attracted a renewed interest due to the accessibility and maturity of ultracompact passive and active integrated components. However, up to now, most of relevant research about optical computing still focus on the realization of fundamental logic gates, not even close to feasible large-scale computing system. In this paper, we demonstrate a high-speed ripple-carry electro-optic full adder using micro-resonators. This approach adopts photons instead of electrons to realize logic operations as well as transfer carry signals from one bit to the next, while all the control signals of operands are applied simultaneously at and within every clock cycle. Thus, the severe latency issue that accumulates as the size of full adder increases can be circumvented, allowing for the improvement in computing speed. This approach also outperforms the conventional electrical counterpart in terms of power consumption due to the relatively smaller propagation loss and switching energy.
Zhoufeng Ying, Zheng Wang, Shounak Dhar, Zheng Zhao, David Z. Pan, and Ray T. Chen, "Microresonator-based electro-optic full adder for optical computing in integrated photonics (Conference Presentation)," Proc. SPIE 10538, Optical Interconnects XVIII, 1053803 (Presented at SPIE OPTO: January 29, 2018; Published: 14 March 2018); https://doi.org/10.1117/12.2288543.5751529133001.
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