Overlay is one of the most critical process control steps of semiconductor manufacturing technology. A typical advanced scheme includes an overlay feedback loop based on after litho optical imaging overlay metrology on scribeline targets. The after litho control loop typically involves high frequency sampling: every lot or nearly every lot. An after etch overlay metrology step is often included, at a lower sampling frequency, in order to characterize and compensate for bias. The after etch metrology step often involves CD-SEM metrology, in this case in-cell and ondevice. This work explores an alternative approach using spectroscopic ellipsometry (SE) metrology and a machine learning analysis technique. Advanced 1x nm DRAM wafers were prepared, including both nominal (POR) wafers with mean overlay offsets, as well as DOE wafers with intentional across wafer overlay modulation. After litho metrology was measured using optical imaging metrology, as well as after etch metrology using both SE and CD-SEM for comparison. We investigate 2 types of machine learning techniques with SE data: model-less and model-based, showing excellent performance for after etch in-cell on-device overlay metrology.
Honggoo Lee , Sangjun Han, Minhyung Hong, Seungyoung Kim, Jieun Lee, DongYoung Lee, Eungryong Oh, Ahlin Choi, Hyowon Park, Waley Liang, DongSub Choi, Nakyoon Kim, Jeongpyo Lee, Stilian Pandev, Sanghuck Jeon, and John C. Robinson , "In-cell overlay metrology by using optical metrology tool," Proc. SPIE 10585, Metrology, Inspection, and Process Control for Microlithography XXXII, 105851D (Presented at SPIE Advanced Lithography: March 01, 2018; Published: 13 March 2018); https://doi.org/10.1117/12.2300946.
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