All chipmakers understand that variability is the enemy of any process and that defectivity reduction is essential to improving yield which translates to profit. Aggressive process window and yield specifications put tight requirements on the DUV light source which will impact scanner imaging performance. Accurate identification of defectivity caused by on wafer hotspots along with the impact on process windows can be accomplished using existing industry capability. ASML’s Brion Lithography Manufacturing Checker (LMC) can be employed using existing models to perform hotspot analysis and verify process window impact for current and future 193 nm nodes.
In this presentation, we review a methodology to understand the effect bandwidth variation has on hotspot variability and defect variation on specific customer designs. Initial studies are based on a large number of customer specific 90 nm pitch layouts where bandwidth variability is investigated for its impact on hotspot variability. Defect density maps are generated from the baseline process with additional maps generated at various bandwidth ranges. This methodology has been applied to Cymer’s DynaPulse and new DynaPulse2 bandwidth control technologies demonstrating the impact that bandwidth variation can influence process defectivity levels.
Will Conley, Yi-Hsing Peng, Xiaolong Zhang, Stephen Hsu, and Raphael La Greca, "Analysis of hotspots that impact defectivity from light source bandwidth variation using Lithography Manufacturability Checker (LMC) (Conference Presentation)," Proc. SPIE 10587, Optical Microlithography XXXI, 105870E (Presented at SPIE Advanced Lithography: February 28, 2018; Published: 20 March 2018); https://doi.org/10.1117/12.2299319.5754401313001.
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