In order to satisfy the requirements of short-wave infrared hyperspectral detection, we developed a 1024 x 512 ROIC with 30μm pixel pitch. CTIA with cascode amplifier was utilized as input stage and CDS was used for eliminating KTC noise and 1/f noise in CTIA. For this large chip with sizes up to 30mm x 20mm, it has been found that column circuit was a major bottleneck to achieve high frame frequency. A solution to solve this problem in this work is to pre-establish the signal of the column amplifier and then buffer odd and even column signals to the bus alternatively. In addition, parasitic capacitance of column-level bus was carefully lowered in layout design. The total readout rate reached 120 Mpixels/s with eight parallel output channels which allowed for a frame rate of 250 Hz.
Zhangcheng Huang, Songlei Huang, Xuquan Wang, Yu Chen, and Jiaxiong Fang, "A 1024×512 ROIC with 30μm pixel pitch and 250Hz high frame rate for shortwave infrared detector," Proc. SPIE 10624, Infrared Technology and Applications XLIV, 106241M (Presented at SPIE Defense + Security: April 19, 2018; Published: 23 May 2018); https://doi.org/10.1117/12.2306043.
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