New concepts in assembly technology boost our daily life in an unknown way. High end semiconductor industry today deals with functional structures down to a few nanometers. ITRS roadmap predicts an ongoing decrease of the “DRAM half pitch” over the next decade. Packaging of course is not intended to realize pitches at the nanometer scale, but has to face the challenges of integrating such semiconductor devices with smallest pitch and high pin counts into systems. Advanced techniques of nondestructive evaluation (NDE) with resolutions in volume better than 1 micrometer vixen size are urgently needed for the safety and reliability of electronic systems, especially those that are used in long living applications. The development speed of integrated circuits is still very high and is not expected to decrease in the next future. The integration density of microelectronic devices is increasing, the dimensions become smaller and the number of I/O's is getting higher. The development of new types of packages must be done with respect to reliability issues. Potential damage sources must be identified and finally avoided in the new packages. In power electronics production the condition monitoring receives a lot of interest to avoid electrical shortcuts, dead solder joints and interface cracking. It is also desired to detect and characterize very small defects like transportation phenomenon or Kirkendall voids. For this purpose, imaging technologies with resolutions in the sub-micron range are required.
N. Meyendorf, M. Oppermann, P. Krueger, M. Roellig, and K. J. Wolter, "NDE applications in microelectronic industries," Proc. SPIE 9806, Smart Materials and Nondestructive Evaluation for Energy Systems 2016, 98060V (Presented at SPIE Smart Structures and Materials + Nondestructive Evaluation and Health Monitoring: March 23, 2016; Published: 20 April 2016); https://doi.org/10.1117/12.2223716.
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