The packaging of high speed Photonic Integrated Circuits (PICs) should maintain the electrical signal integrity. The standard packaging of high speed PICs relies on wire bonds. This is not desirable because wire bonds degrade the quality of the electrical signal. The research presented in this paper proposes to replace wire bonds with an interposer with multilevel transmission lines. By attaching the PIC by flip chip onto the interposer, the use of wire bonds is avoided. The main concern for designing an interposer with multilevel transmission lines is the vertical transition, which must be designed to avoid return and radiation losses. In this paper, a novel design of a high speed vertical transition for Low Temperature Co-fired Ceramic (LTCC) is presented. The proposed vertical transition is simpler than others recently published in the literature, due to eliminating the need for additional ceramic layers or air cavities. A LTCC board was fabricated with several variations of the presented transition to find the optimal dimensions of the structure. The structures were fabricated then characterized and have a 3 dB bandwidth of 37 GHz and an open eye diagram at 44 Gbps. A full wave electromagnetic simulation is described and compared with good agreement to the measurements. The results suggest that an LTCC board with this design can be used for 40 Gbps per channel applications. Keywords: Photonics packaging, Low Temperature Co-Fired Ceramics.
M. A. Jezzini, P. J. Marraccini, and F. H. Peters, "Design of a high-speed vertical transition in LTCC for interposers suitable for packaging photonic integrated circuits," Proc. SPIE 9891, Silicon Photonics and Photonic Integrated Circuits V, 98911R (Presented at SPIE Photonics Europe: April 07, 2016; Published: 13 May 2016); https://doi.org/10.1117/12.2227628.
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