PROCEEDINGS VOLUME 1405
5TH CONGRESS OF THE BRAZILIAN SOCIETY OF MICROELECTRONICS | JUL 1 - AUG 1 1990
5th Congress of the Brazilian Society of Microelectronics
IN THIS VOLUME

0 Sessions, 20 Papers, 0 Presentations
5TH CONGRESS OF THE BRAZILIAN SOCIETY OF MICROELECTRONICS
Jul 1 - Aug 1 1990
Sao Paulo, Brazil
Advanced MOS Technologies
Proc. SPIE 1405, Single defects and noise in sub-u MOSFETs, 0000 (1 November 1990); doi: 10.1117/12.26292
Proc. SPIE 1405, Improvement of thermal SiO2 properties for advanced MOS technologies, 0000 (1 November 1990); doi: 10.1117/12.26293
Proc. SPIE 1405, Bidimensional simulation of MOSFETs in thermal equilibrium, 0000 (1 November 1990); doi: 10.1117/12.26294
Proc. SPIE 1405, Double-level metal process for 1-um technologies, 0000 (1 November 1990); doi: 10.1117/12.26295
Proc. SPIE 1405, Analytical model for the potential drop in the silicon substrate on thin-film SOI MOSFETs and its influence on the threshold voltage, 0000 (1 November 1990); doi: 10.1117/12.26296
Proc. SPIE 1405, Smart power high-side switch technology for low-voltage automotive applications, 0000 (1 November 1990); doi: 10.1117/12.26297
Proc. SPIE 1405, Technology and design of SIPOS films used as field plates for high-voltage planar devices, 0000 (1 November 1990); doi: 10.1117/12.26298
Ion Implantation and Compound Semiconductors
Proc. SPIE 1405, Ion implantation in Gallium Arsenide MESFET technology, 0000 (1 November 1990); doi: 10.1117/12.26299
Proc. SPIE 1405, Versatile ion implanter for submicron and 3-D device engineering, 0000 (1 November 1990); doi: 10.1117/12.26300
Proc. SPIE 1405, Oxygen and nitrogen effects on the electronic properties of RF-sputtered a-SiGe alloys, 0000 (1 November 1990); doi: 10.1117/12.26301
Proc. SPIE 1405, Hot electron launching using the AlxGa1-xAs/GaAs n-n heterojunction, 0000 (1 November 1990); doi: 10.1117/12.26302
VLSI Design Methodologies
Proc. SPIE 1405, VLSI layout synthesis, 0000 (1 November 1990); doi: 10.1117/12.26303
Proc. SPIE 1405, Software to support logic synthesis from behavioral specifications, 0000 (1 November 1990); doi: 10.1117/12.26304
Proc. SPIE 1405, Architecture and algorithm of a circuit simulator, 0000 (1 November 1990); doi: 10.1117/12.26305
Proc. SPIE 1405, State assignment algorithm for incompletely specified finite state machines, 0000 (1 November 1990); doi: 10.1117/12.26306
Proc. SPIE 1405, Artificial neural networks: principles and VLSI implementation, 0000 (1 November 1990); doi: 10.1117/12.26307
Proc. SPIE 1405, PC-based automated extraction of electrical parameters for VLSI MOSFETs: methods, algorithms, and implementation, 0000 (1 November 1990); doi: 10.1117/12.26308
Proc. SPIE 1405, Two case studies for Level Sensitive Scan Design methodology, 0000 (1 November 1990); doi: 10.1117/12.26309
Proc. SPIE 1405, Design of the datapath of a 16-bit RISC microprocessor using CMOS gate arrays technology, 0000 (1 November 1990); doi: 10.1117/12.26310
Proc. SPIE 1405, Hierarchical circuit extractor, 0000 (1 November 1990); doi: 10.1117/12.26311
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