PROCEEDINGS VOLUME 2090
MICROELECTRONIC PROCESSING '93 | 26-30 SEPTEMBER 1993
Multilevel Interconnection: Issues That Impact Competitiveness
IN THIS VOLUME

0 Sessions, 24 Papers, 0 Presentations
MICROELECTRONIC PROCESSING '93
26-30 September 1993
Monterey, CA, United States
Process Integration Issues
Proc. SPIE 2090, Triple-level metal process for high-performance and high-density 0.6-um/5-V application-specific integrated circuits, 0000 (15 September 1993); doi: 10.1117/12.156512
Proc. SPIE 2090, Reactively sputtered coherent TiN process for sub-0.5-um technology, 0000 (15 September 1993); doi: 10.1117/12.156523
Proc. SPIE 2090, Development of reliable multilayer metallization for submicron ULSI technology, 0000 (15 September 1993); doi: 10.1117/12.156529
Proc. SPIE 2090, Barrier layer metallization schemes for ULSI technologies, 0000 (15 September 1993); doi: 10.1117/12.156530
Proc. SPIE 2090, Interaction between photoresist pretreatment and high-aspect-ratio contact and via hole definition, 0000 (15 September 1993); doi: 10.1117/12.156531
Proc. SPIE 2090, Effects of ILD thickness and slope-etch depth on via performance and metal filling characteristics, 0000 (15 September 1993); doi: 10.1117/12.156532
Proc. SPIE 2090, Process integration issues in chemical-vapor-deposited copper-based metallization, 0000 (15 September 1993); doi: 10.1117/12.156533
Planarization Processes
Proc. SPIE 2090, Spin on glass (SOG)-based planarization scheme compatible with a stacked via multilevel metal process, 0000 (15 September 1993); doi: 10.1117/12.156534
Proc. SPIE 2090, Advanced techniques for interlayer dielectric deposition and planarization, 0000 (15 September 1993); doi: 10.1117/12.156535
Proc. SPIE 2090, Extending resist-etch-back planarization to 0.5-um logic and ASIC circuits, 0000 (15 September 1993); doi: 10.1117/12.156513
Proc. SPIE 2090, Slurry chemistry effects during chemical-mechanical polishing of silicon oxide films, 0000 (15 September 1993); doi: 10.1117/12.156514
Proc. SPIE 2090, Spin on glass (SOG) etch-back planarization process: an industrial solution for 0.5-um CMOS TLM technology, 0000 (15 September 1993); doi: 10.1117/12.156515
Proc. SPIE 2090, Application of APCVD TEOS/ozone thin films in < 0.5-um IC fabrication: trench and intermetal dielectric isolation and gap fill, 0000 (15 September 1993); doi: 10.1117/12.156516
Reliability Issues
Proc. SPIE 2090, Confinement effects of oxide overlayers on the stress and yield behavior of Al alloys, 0000 (15 September 1993); doi: 10.1117/12.156517
Proc. SPIE 2090, Elimination of stress-induced voids on AlCu multilevel interconnect lines, 0000 (15 September 1993); doi: 10.1117/12.156518
Proc. SPIE 2090, Yield and reliability of laser-formed vertical links, 0000 (15 September 1993); doi: 10.1117/12.156519
Proc. SPIE 2090, Statistical reliability control from an IC user's perspective, 0000 (15 September 1993); doi: 10.1117/12.156520
Proc. SPIE 2090, Wafer level reliability: competitiveness and implementation issues, 0000 (15 September 1993); doi: 10.1117/12.156521
Proc. SPIE 2090, Increasing the accuracy of lifetime predictions from accelerated electromigration tests, 0000 (15 September 1993); doi: 10.1117/12.156522
Novel Materials and Techniques
Proc. SPIE 2090, Simplified air bridge technique using photoresist UV stabilization process, 0000 (15 September 1993); doi: 10.1117/12.156524
Proc. SPIE 2090, Temperature measurements on metallic lines under current stresses by laser probing and correlation with electromigration tests at wafer level, 0000 (15 September 1993); doi: 10.1117/12.156525
Proc. SPIE 2090, Properties of silicon oxide deposited by electron-cyclotron-resonance plasma-enhanced chemical vapor deposition, 0000 (15 September 1993); doi: 10.1117/12.156526
Proc. SPIE 2090, Investigation of latch-up phenomenon in sea-of-gate ASIC devices, 0000 (15 September 1993); doi: 10.1117/12.156527
Proc. SPIE 2090, Simulations of metallization uniformity from large planar sputtering targets, 0000 (15 September 1993); doi: 10.1117/12.156528
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