PROCEEDINGS VOLUME 2914
PHOTONICS EAST '96 | 18-22 NOVEMBER 1996
High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
PHOTONICS EAST '96
18-22 November 1996
Boston, MA, United States
Breakthroughs in Algorithms, Imaging, DSP, and Numerical Analysis I
Proc. SPIE 2914, Signed-digit online floating-point arithmetic for FPGAs, 0000 (21 October 1996); doi: 10.1117/12.255805
Proc. SPIE 2914, Design of high-radix digit slices for online computations, 0000 (21 October 1996); doi: 10.1117/12.255816
Proc. SPIE 2914, Performance evaluation of FPGA implementations of high-speed addition algorithms, 0000 (21 October 1996); doi: 10.1117/12.255826
Proc. SPIE 2914, 250-MHz correlation using high-performance reconfigurable computing engines, 0000 (21 October 1996); doi: 10.1117/12.255833
Proc. SPIE 2914, Implementation of a finite difference method on a custom computing platform, 0000 (21 October 1996); doi: 10.1117/12.255834
Proc. SPIE 2914, User-configurable data acquisition systems, 0000 (21 October 1996); doi: 10.1117/12.255835
Breakthroughs in Algorithms, Imaging, DSP, and Numerical Analysis II
Proc. SPIE 2914, Internal sorting and FPGA, 0000 (21 October 1996); doi: 10.1117/12.255836
Proc. SPIE 2914, Polynomial-transform-based approach to computing 2D DFTs using reconfigurable computers, 0000 (21 October 1996); doi: 10.1117/12.255837
Proc. SPIE 2914, Configurable adaptive signal processing subsystem for various applications in telemetry, navigation, and telecommunication, 0000 (21 October 1996); doi: 10.1117/12.255838
Proc. SPIE 2914, Dynamic hardware video processing platform, 0000 (21 October 1996); doi: 10.1117/12.255806
Proc. SPIE 2914, DSP filters in FPGAs for image processing applications, 0000 (21 October 1996); doi: 10.1117/12.255807
Proc. SPIE 2914, Image processing using reconfigurable FPGAs, 0000 (21 October 1996); doi: 10.1117/12.255808
Architectures for High-Performance Reconfigurable Computing
Proc. SPIE 2914, Design tips and experiences in using reconfigurable FLEX logic, 0000 (21 October 1996); doi: 10.1117/12.255809
Proc. SPIE 2914, Programmable hardware for reconfigurable computing systems, 0000 (21 October 1996); doi: 10.1117/12.255810
Proc. SPIE 2914, Hierarchical decomposition model for reconfigurable architecture, 0000 (21 October 1996); doi: 10.1117/12.255811
Proc. SPIE 2914, Review of field-programmable analog arrays, 0000 (21 October 1996); doi: 10.1117/12.255812
Proc. SPIE 2914, PCI-based WILDFIRE reconfigurable computing engines, 0000 (21 October 1996); doi: 10.1117/12.255813
Proc. SPIE 2914, Reconfigurable-logic-based fiber channel network card, 0000 (21 October 1996); doi: 10.1117/12.255814
Proc. SPIE 2914, Colt: an experiment in wormhole run-time reconfiguration, 0000 (21 October 1996); doi: 10.1117/12.255815
Proc. SPIE 2914, Computational acceleration methodologies: advantages of reconfigurable acceleration subsystems, 0000 (21 October 1996); doi: 10.1117/12.255817
Design Methods and Tools for Reconfigurable Computing
Proc. SPIE 2914, Malleable architecture generator for FPGA computing, 0000 (21 October 1996); doi: 10.1117/12.255818
Proc. SPIE 2914, Resource pools: an abstraction for configurable computing codesign, 0000 (21 October 1996); doi: 10.1117/12.255819
Proc. SPIE 2914, Solving graph problems with dynamic computation structures, 0000 (21 October 1996); doi: 10.1117/12.255820
Proc. SPIE 2914, Using reconfigurable hardware to customize memory hierarchies, 0000 (21 October 1996); doi: 10.1117/12.255821
Proc. SPIE 2914, Compiling high-level languages for configurable computers: applying lessons from heterogeneous processing, 0000 (21 October 1996); doi: 10.1117/12.255822
Proc. SPIE 2914, Rapid prototyping of datapath intensive architectures with HML: an abstract hardware description language, 0000 (21 October 1996); doi: 10.1117/12.255823
Proc. SPIE 2914, Codesign and high-performance computing: scenes and crisis, 0000 (21 October 1996); doi: 10.1117/12.255824
Proc. SPIE 2914, FPGA applications in digital video systems, 0000 (21 October 1996); doi: 10.1117/12.255825
Proc. SPIE 2914, Application of FPGA technology to performance limitations in radiation therapy, 0000 (21 October 1996); doi: 10.1117/12.255827
Proc. SPIE 2914, Embedding large multidimensional DSP computations in reconfigurable logic, 0000 (21 October 1996); doi: 10.1117/12.255828
Proc. SPIE 2914, FPGA-based transformable coprocessor for MPEG video processing, 0000 (21 October 1996); doi: 10.1117/12.255829
Proc. SPIE 2914, Guide to using field programmable gate arrays (FPGAs) for application-specific digital signal processing performance, 0000 (21 October 1996); doi: 10.1117/12.255830
Proc. SPIE 2914, Reconfigurable hardware accelerator for embedded DSP, 0000 (21 October 1996); doi: 10.1117/12.255831
Proc. SPIE 2914, Large-scale logic array computation, 0000 (21 October 1996); doi: 10.1117/12.255832
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