PROCEEDINGS VOLUME 3844
PHOTONICS EAST '99 | 19-22 SEPTEMBER 1999
Reconfigurable Technology: FPGAs for Computing and Applications
IN THIS VOLUME

0 Sessions, 19 Papers, 0 Presentations
Applications  (6)
PHOTONICS EAST '99
19-22 September 1999
Boston, MA, United States
Digital Signal Processing
Proc. SPIE 3844, Direct digital synthesis: some options for FPGA implementation, 0000 (26 August 1999); doi: 10.1117/12.359534
Proc. SPIE 3844, Algorithm-agile cryptographic coprocessor based on FPGAs, 0000 (26 August 1999); doi: 10.1117/12.359537
Proc. SPIE 3844, FPGA implementation of image component labeling, 0000 (26 August 1999); doi: 10.1117/12.359538
Architectures
Proc. SPIE 3844, Quick qard technology: hardware object-oriented use and RC management system, 0000 (26 August 1999); doi: 10.1117/12.359539
Proc. SPIE 3844, Toward an FPGA architecture optimized for public-key algorithms, 0000 (26 August 1999); doi: 10.1117/12.359540
Proc. SPIE 3844, High-bandwidth and low latency from a three-dimensional reconfigurable interconnect, 0000 (26 August 1999); doi: 10.1117/12.359541
Proc. SPIE 3844, FPGA/FPAA-based rapid prototyping environment for mixed signal systems, 0000 (26 August 1999); doi: 10.1117/12.359542
Proc. SPIE 3844, Some applications for the PLDSP (tm) reconfigurable signal processor, 0000 (26 August 1999); doi: 10.1117/12.359543
Proc. SPIE 3844, IP validation for FPGAs using Hardware Object Technology(tm), 0000 (26 August 1999); doi: 10.1117/12.359525
Software Tools
Proc. SPIE 3844, Methodology for the analysis of dynamic application parallelism and its application to reconfigurable computing, 0000 (26 August 1999); doi: 10.1117/12.359526
Proc. SPIE 3844, Design advantages of run-time reconfiguration, 0000 (26 August 1999); doi: 10.1117/12.359527
Proc. SPIE 3844, Combined temporal partitioning and scheduling for reconfigurable architectures, 0000 (26 August 1999); doi: 10.1117/12.359528
Proc. SPIE 3844, Image processing coprocessor implementation for Xilinx XC6000 series FPGAs, 0000 (26 August 1999); doi: 10.1117/12.359529
Applications
Proc. SPIE 3844, GeneticFPGA: a java-based tool for evolving stable circuits, 0000 (26 August 1999); doi: 10.1117/12.359530
Proc. SPIE 3844, Adaptive motor control with reconfigurable logic, 0000 (26 August 1999); doi: 10.1117/12.359531
Proc. SPIE 3844, Processing system for real-time holographic video computation, 0000 (26 August 1999); doi: 10.1117/12.359532
Proc. SPIE 3844, Adaptive 2D feature detection using dynamic reconfiguration, 0000 (26 August 1999); doi: 10.1117/12.359533
Proc. SPIE 3844, Fixed-point multiplier evaluation and design with FPGA, 0000 (26 August 1999); doi: 10.1117/12.359535
Proc. SPIE 3844, Design of an adaptive reconfigurable router for robotics vision systems, 0000 (26 August 1999); doi: 10.1117/12.359536
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