PROCEEDINGS VOLUME 3881
MICROELECTRONIC MANUFACTURING '99 | 22-23 SEPTEMBER 1999
Microelectronic Device Technology III
MICROELECTRONIC MANUFACTURING '99
22-23 September 1999
Santa Clara, CA, United States
Advanced Device Technology
Proc. SPIE 3881, High-K gate dielectrics, 0000 (1 September 1999); doi: 10.1117/12.360537
Proc. SPIE 3881, CVD Si1-xGex epitaxial growth and its applications to MOS devices, 0000 (1 September 1999); doi: 10.1117/12.360548
Proc. SPIE 3881, Metal gates for advanced CMOS technology, 0000 (1 September 1999); doi: 10.1117/12.360560
Proc. SPIE 3881, Characterization of tungsten silicide (WSix) film grown by chemical vapor deposition (CVD), 0000 (1 September 1999); doi: 10.1117/12.360567
Proc. SPIE 3881, Suppression of floating body effect by controlling potential profile in the lower body region of SOI MOSFETs, 0000 (1 September 1999); doi: 10.1117/12.360568
Proc. SPIE 3881, Sub-0.1-um vertical MOS transistor, 0000 (1 September 1999); doi: 10.1117/12.360569
Proc. SPIE 3881, Fabrication of nanometer Schottky-tunneling MOSFETs by a novel silicide nanopatterning method, 0000 (1 September 1999); doi: 10.1117/12.360570
RF Devices and Technology
Proc. SPIE 3881, UHF2: a 0.6-um 25-GHz BiCMOS technology for mixed-signal wireless communications applications, 0000 (1 September 1999); doi: 10.1117/12.360571
Proc. SPIE 3881, New high-performance complementary bipolar technology featuring 45-GHz NPN and 20-GHz PNP devices, 0000 (1 September 1999); doi: 10.1117/12.360538
CMOS Integration, Devices, and Manufacturing
Proc. SPIE 3881, Hybrid Cu and Al interconnects for high-performance system LSI, 0000 (1 September 1999); doi: 10.1117/12.360540
Proc. SPIE 3881, Effects of high-density plasma processing on MOSFET matching, noise, and hot carrier reliability, 0000 (1 September 1999); doi: 10.1117/12.360541
Proc. SPIE 3881, Mismatch characterization and modelization of deep-submicron CMOS transistors, 0000 (1 September 1999); doi: 10.1117/12.360542
Proc. SPIE 3881, Systematic methodology for optimizing the tradeoff of polysilicon depletion versus boron penetration in sub-0.18-um surface-channel PMOS devices, 0000 (1 September 1999); doi: 10.1117/12.360543
Proc. SPIE 3881, Improved p-ch MOS transistor performance with an arsenic supersteep retrograde channel profile, 0000 (1 September 1999); doi: 10.1117/12.360544
Proc. SPIE 3881, Performance of submicron CMOS device and logic gates with substrate biasing, 0000 (1 September 1999); doi: 10.1117/12.360545
Proc. SPIE 3881, Degradation of PMOS series resistance due to Si implantation for Ti-salicide process, 0000 (1 September 1999); doi: 10.1117/12.360546
Proc. SPIE 3881, Influence of laser annealing conditions on the performance of 0.6-um polysilicon TFTs, 0000 (1 September 1999); doi: 10.1117/12.360547
Sub-0.1-um CMOS
Proc. SPIE 3881, Estimation of quantum mechanical and polysilicon depletion effects for ultrathin silicon dioxide gate dielectric, 0000 (1 September 1999); doi: 10.1117/12.360549
Proc. SPIE 3881, Gate-length- and threshold-voltage-dependent nonlinearity in the hot carrier DC lifetime extrapolation for sub-100-nm NMOS devices, 0000 (1 September 1999); doi: 10.1117/12.360551
Proc. SPIE 3881, Effects of indium implant and post-RTA on performance and reliability of sub-100-nm retrograde channel NMOSFETs, 0000 (1 September 1999); doi: 10.1117/12.360552
Proc. SPIE 3881, Drain profile engineering for MOSFET devices with channel lengths below 100 nm, 0000 (1 September 1999); doi: 10.1117/12.360553
Gate Oxide and Isolation
Proc. SPIE 3881, Quantitative analysis of SILCs (stress-induced leakage currents) based on the inelastic trap-assisted tunneling model, 0000 (1 September 1999); doi: 10.1117/12.360554
Proc. SPIE 3881, Stress minimization of corner rounding process during STI, 0000 (1 September 1999); doi: 10.1117/12.360555
Proc. SPIE 3881, Stress-induced leakage currents of CMOS ULSI devices with shallow trench isolation, 0000 (1 September 1999); doi: 10.1117/12.360556
Proc. SPIE 3881, Improvement of ultrathin gate oxide by a novel rapid thermal oxidation process with in-situ steam generation, 0000 (1 September 1999); doi: 10.1117/12.360557
Proc. SPIE 3881, Integrated simulation of the plasma-assisted gate oxide nitridation, 0000 (1 September 1999); doi: 10.1117/12.360558
Proc. SPIE 3881, Deep discrete trenches filled by in-situ doped polysilicon: an alternative method for junction insulating box, 0000 (1 September 1999); doi: 10.1117/12.360559
Poster Session
Proc. SPIE 3881, Effect of hydrogenation on the electrophysical properties of ion-doped GaAs, 0000 (1 September 1999); doi: 10.1117/12.360561
Proc. SPIE 3881, Optimization of a wet-patterning bottom antireflective i-line coating for both poly gate and metal lithography processes, 0000 (1 September 1999); doi: 10.1117/12.360563
Proc. SPIE 3881, Formation of heavily boron-doped nanolayer in silicon by powerful ion irradiation, 0000 (1 September 1999); doi: 10.1117/12.360564
Proc. SPIE 3881, Photoelectric characteristics of inhomogeneous MOS silicon-based structures, 0000 (1 September 1999); doi: 10.1117/12.360565
Proc. SPIE 3881, Impact of active dimension on junction leakages of a Ti-salicide process integrated with shallow-trench isolation, 0000 (1 September 1999); doi: 10.1117/12.360566
Advanced Device Technology
Proc. SPIE 3881, Scaling the gate dielectric, 0000 (1 September 1999); doi: 10.1117/12.360539
Proc. SPIE 3881, Integration challenges at 0.15-um technology node, 0000 (1 September 1999); doi: 10.1117/12.360550
Proc. SPIE 3881, Mainstreaming SOI CMOS technology, 0000 (1 September 1999); doi: 10.1117/12.360562
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