PROCEEDINGS VOLUME 4182
MICROELECTRONIC MANUFACTURING | 18-19 SEPTEMBER 2000
Process Control and Diagnostics
MICROELECTRONIC MANUFACTURING
18-19 September 2000
Santa Clara, CA, United States
Line Control and Diagnostics I
Proc. SPIE 4182, Lithography overlay controller formulation, 0000 (23 August 2000); doi: 10.1117/12.410061
Proc. SPIE 4182, Adaptive control of multiple product processes, 0000 (23 August 2000); doi: 10.1117/12.410070
Proc. SPIE 4182, Feed-forward control for a lithography/etch sequence, 0000 (23 August 2000); doi: 10.1117/12.410080
Proc. SPIE 4182, Real-time process control to prevent CD variation induced by postexposure delay, 0000 (23 August 2000); doi: 10.1117/12.410094
Proc. SPIE 4182, Fault detection and predictive maintenance program using SEMY Statistical Machine Control (SMC), 0000 (23 August 2000); doi: 10.1117/12.410101
Proc. SPIE 4182, Real-time control of photoresist thickness uniformity during the bake process, 0000 (23 August 2000); doi: 10.1117/12.410103
Line Control and Diagnostics II
Proc. SPIE 4182, Sensitivity of polysilicon and polycide antenna MOS capacitor to ion implantation charging effects, 0000 (23 August 2000); doi: 10.1117/12.410104
Proc. SPIE 4182, Small signal ac-surface photovoltage technique for noncontact monitoring of near-surface doping for IC-processing, 0000 (23 August 2000); doi: 10.1117/12.410062
Metrology and Sensors
Proc. SPIE 4182, Modeling and control of thermocouples for reduced measurement uncertainty in diffusion furnaces, 0000 (23 August 2000); doi: 10.1117/12.410063
Proc. SPIE 4182, Technique of electrical beam treatment leading to an accurate and reliable critical dimension metrology measurement on a postetch layer, 0000 (23 August 2000); doi: 10.1117/12.410064
Proc. SPIE 4182, Characterization of copper oxidation and reduction using spectroscopic ellipsometry, 0000 (23 August 2000); doi: 10.1117/12.410065
Proc. SPIE 4182, Rapid x-ray reflectometry (XRR) metrology applied to Cu/low-k damascene process development, 0000 (23 August 2000); doi: 10.1117/12.410066
Proc. SPIE 4182, Feasibility and applicability of integrated metrology using spectroscopic ellipsometry in a cluster tool, 0000 (23 August 2000); doi: 10.1117/12.410067
Proc. SPIE 4182, New method for determining the optical properties of thin films by reflectometry, 0000 (23 August 2000); doi: 10.1117/12.410068
Proc. SPIE 4182, Why single-machine processing overlay error still fails: reticle interference effect and our solution on IC foundry fab, 0000 (23 August 2000); doi: 10.1117/12.410069
Reliability I
Proc. SPIE 4182, Off-line wafer level reliability control: unique measurement method to monitor the lifetime indicator of gate oxide validated within bipolar/CMOS/DMOS technology, 0000 (23 August 2000); doi: 10.1117/12.410072
Proc. SPIE 4182, High-density plasma FSG charging damage, 0000 (23 August 2000); doi: 10.1117/12.410073
Proc. SPIE 4182, Design and reliability aspects of multilevel metal large-scale power line layouts in ULSI-ICs, 0000 (23 August 2000); doi: 10.1117/12.410074
Proc. SPIE 4182, Fast wafer-level detection and control of interconnect reliability, 0000 (23 August 2000); doi: 10.1117/12.410075
Proc. SPIE 4182, Special simulator to study metastability, 0000 (23 August 2000); doi: 10.1117/12.410076
Proc. SPIE 4182, Reliability certification of semiconductor devices using Goldthwaite diagrams, 0000 (23 August 2000); doi: 10.1117/12.410077
Reliability II
Proc. SPIE 4182, Corrective actions for stainless-steel-particle-related burn-in failures, 0000 (23 August 2000); doi: 10.1117/12.410078
Proc. SPIE 4182, Electrical reliability of conductive adhesive joints: curing conditions and current density dependence, 0000 (23 August 2000); doi: 10.1117/12.410079
Yield Enhancement and Failure Analysis
Proc. SPIE 4182, Automated alignment scheme for in-line defect data, 0000 (23 August 2000); doi: 10.1117/12.410081
Proc. SPIE 4182, Raman spectroscopy: a multifunctional analysis tool for microelectronics manufacturing, 0000 (23 August 2000); doi: 10.1117/12.410082
Proc. SPIE 4182, Deep-ultraviolet scatterometry for nanoparticle detection, 0000 (23 August 2000); doi: 10.1117/12.410083
Proc. SPIE 4182, Fault detection in CMOS manufacturing using MBPCA, 0000 (23 August 2000); doi: 10.1117/12.410084
Proc. SPIE 4182, Formation mechanism of submicrometer poly-Si surface defects, 0000 (23 August 2000); doi: 10.1117/12.410085
Proc. SPIE 4182, Discolored bondpads caused by aluminum hydroxide formation, 0000 (23 August 2000); doi: 10.1117/12.410086
Poster Session
Proc. SPIE 4182, New overlay pattern design for real-time focus and tilt monitor, 0000 (23 August 2000); doi: 10.1117/12.410087
Proc. SPIE 4182, Nonlinear optical properties of SiC nanocrystallites, 0000 (23 August 2000); doi: 10.1117/12.410088
Proc. SPIE 4182, Helical sensitive elements with layered filling, 0000 (23 August 2000); doi: 10.1117/12.410089
Proc. SPIE 4182, Planarization process of BPSG: capillary vs. centrifugal/gravitational forces, 0000 (23 August 2000); doi: 10.1117/12.410090
Proc. SPIE 4182, Critical dimension control of 0.18-um logic with dual polysilicon gate, 0000 (23 August 2000); doi: 10.1117/12.410091
Proc. SPIE 4182, Maturity assessment of 300-mm etch equipment, 0000 (23 August 2000); doi: 10.1117/12.410092
Proc. SPIE 4182, Evaluation techniques for 300-mm equipment, 0000 (23 August 2000); doi: 10.1117/12.410093
Proc. SPIE 4182, Triant model ware applied to Tegal 90X etchers as an integrated process control module, 0000 (23 August 2000); doi: 10.1117/12.410095
Proc. SPIE 4182, Subresolution process windows and yield estimation technique based on detailed full-chip CD simulation, 0000 (23 August 2000); doi: 10.1117/12.410096
Proc. SPIE 4182, Effect of registration and proximity effect in split-gate flash device, 0000 (23 August 2000); doi: 10.1117/12.410097
Proc. SPIE 4182, Real-time yield checks at wafer test, 0000 (23 August 2000); doi: 10.1117/12.410098
Proc. SPIE 4182, Photo-developing defect and developing-like defect on DUV process, 0000 (23 August 2000); doi: 10.1117/12.410099
Proc. SPIE 4182, Structure and electronic properties of silicon oxynitride as gate dielectric, 0000 (23 August 2000); doi: 10.1117/12.410100
Proc. SPIE 4182, Influence of preannealing on residual stresses in boron-doped LPCVD polysilicon film, 0000 (23 August 2000); doi: 10.1117/12.410102
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