PROCEEDINGS VOLUME 4525
ITCOM 2001: INTERNATIONAL SYMPOSIUM ON THE CONVERGENCE OF IT AND COMMUNICATIONS | 20-24 AUGUST 2001
Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III
IN THIS VOLUME

0 Sessions, 18 Papers, 0 Presentations
Tools I  (3)
Tools II  (4)
Algorithms I  (4)
Systems I  (2)
Systems II  (3)
ITCOM 2001: INTERNATIONAL SYMPOSIUM ON THE CONVERGENCE OF IT AND COMMUNICATIONS
20-24 August 2001
Denver, CO, United States
Tools I
Proc. SPIE 4525, Fault injection emulator for field-programmable gate arrays, (24 July 2001);doi: 10.1117/12.434369
Proc. SPIE 4525, Transformation from C-program to circuitry for a dynamically reconfigurable cell array processor, (24 July 2001);doi: 10.1117/12.434378
Proc. SPIE 4525, Designing application-specific cores using JBits: a run-time parameterizable FIR filter, (24 July 2001);doi: 10.1117/12.434381
Tools II
Proc. SPIE 4525, Temporal partitioning of circuits for advanced partially reconfigurable systems, (24 July 2001);doi: 10.1117/12.434382
Proc. SPIE 4525, Model-based performance analysis for reconfigurable coprocessors, (24 July 2001);doi: 10.1117/12.434383
Proc. SPIE 4525, Configuration subsystem design exploration for domain-specific reconfigurable technologies, (24 July 2001);doi: 10.1117/12.434384
Proc. SPIE 4525, Programming high-performance reconfigurable computers, (24 July 2001);doi: 10.1117/12.434385
Algorithms I
Proc. SPIE 4525, Real-time debugger with bitstream configurator and C language design control for FPGAs, (24 July 2001);doi: 10.1117/12.434386
Proc. SPIE 4525, Digital FPGA implementation for Bellman-Ford computation, (24 July 2001);doi: 10.1117/12.434370
Proc. SPIE 4525, Reconfiguring an FPGA-based RISC for LNS arithmetic, (24 July 2001);doi: 10.1117/12.434371
Proc. SPIE 4525, Highly reconfigurable communication protocol multiplexing element for SCOPH, (24 July 2001);doi: 10.1117/12.434372
Algorithms II
Proc. SPIE 4525, Spatially reconfigurable module for FIR filters, (24 July 2001);doi: 10.1117/12.434373
Proc. SPIE 4525, Run-time reconfigurable 2D discrete wavelet transform using JBits, (24 July 2001);doi: 10.1117/12.434374
Systems I
Proc. SPIE 4525, Network processor architecture for flexible buffer management in very high speed line interfaces, (24 July 2001);doi: 10.1117/12.434375
Proc. SPIE 4525, Reconfigurable processors for handhelds and wearables: application analysis, (24 July 2001);doi: 10.1117/12.434376
Systems II
Proc. SPIE 4525, Variable length decoder on dynamically reconfigurable cell array processor, (24 July 2001);doi: 10.1117/12.434377
Proc. SPIE 4525, XHWIF: a portable hardware interface for reconfigurable computing, (24 July 2001);doi: 10.1117/12.434379
Proc. SPIE 4525, Signal processing for multiuser wireless systems on reconfigurable platforms, (24 July 2001);doi: 10.1117/12.434380
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