The complexity of photomasks is rapidly increasing as semiconductor devices are scaled down and optical proximity correction (OPC) becomes commonplace. Raster scan architectures are well suited to the challenge of maintaining mask throughput despite these trends. Electron-beam techniques have the resolution to support OPC requirements into the foreseeable future. The MEBES® eXara mask pattern generator combines the resolution of a finely focused electron probe with the productivity and accuracy of Raster Graybeam patterning. Features below 100nm can be created, and OPC designs are produced with consistent fidelity. Write time is independent of resist sensitivity, allowing high-dose processes to be extended, and relaxing sensitivity constraints on advanced chemically amplified resists. The system is designed for the production of 100nm photomasks, and will support the development of 70nm masks.

The demands for shrinking critical dimension (CD) and for tight control of CD uniformity on photomask are rapidly increasing. To keep pace with the demands, optical pattern generators using i-line resist is expanding its capability by continuously modifying hardware and writing strategies. Aside from their advantage of high throughput and layer-to- layer alignability for phase-shifting masks (PSM), this optical process has proven to show a good capability in view of the mean-to-target (MTT) control. In this paper, we investigate the extended capability of a laser writing tool for 180nm node and below in view of process-induced limitations and systematic errors. We also discuss the effects of pattern density and of writing strategy on Cd accuracy and pattern placement error. Since MTT and CD uniformity error for 180 nm generation device are critical for wafer printing, we scrutinize process-induced limitations and systematic errors. The process-induced limitations, related to pattern density and shape, are discussed along with the football effect and iso-dense bias.

Etec Systems, Inc., an Applied Materials company, has completed the implementation and characterization of a deep ultraviolet (DUV), multibeam, raster-scanned mask patterning and integrated process solution. The ALTA® 4000 mask pattern generation system integrates a new data path, environmental control system, DUV optics, a 257nm DUV continuous-wave laser source, and an environmentally stable chemically amplified resist (CAR) process to deliver superior productivity, improved resolution, and critical dimension (CD) control required for volume 130nm mask production. Additionally, to obtain the maximum benefit of this mask pattern generation system, Etec has completed development of an environmentally stable CAR process, which has been tailored to allow the maskmaking industry to continue to receive pre-coated mask blanks from commercial suppliers. This paper details the system architecture and presents system performance and characterization data. The characterization results of the integrated system and process solution are also presented. This integrated pattern generation and process solution continues the tradition of the production workhorse ALTA product line with the introduction of the ALTA 4000 scanned-laser mask pattern generation system.

Pattern generation founded on micro-mirror spatial light modulator (SLM) imaging presents a way to manage the decreasing feature sizes and increasing pattern complexities dictated by Moore's law. This paper identifies the critical elements of the imaging in the implementation of such a pattern generator. We show how the laser illumination, SLM chip, and optics collectively generate the image, and in particular, that these elements can be manufactured and integrated to specification. Expected deficiencies and variations in image quality are then effectively countered with calibration routines that bring final performance to within lithographic requirements, while also being manageable in design and turn-around-times.

A new advanced e-beam reticle writing system HL-950M has been developed to meet requirements for the production of 130 nm node reticles as well as the development of 100 nm node reticles. In order to improve the critical dimension (CD) accuracy and pattern positioning accuracy, several new technologies have been introduced. Fine address size is realized by a newly developed control electronics that enables the system to handle address unit of 2.5 nm, providing four times higher resolution than that of the previous systems. Reconstruction of sub-sub-field (SSF) pattern data has been developed so that the same pattern is exposed twice with reconstructed SSF pattern data sets with different SSF boundaries, realizing better stitching and positioning accuracy. High accuracy proximity effect correction has been developed with a new second order proximity effect calculation scheme, particularly promising better CD linearity. As main results of the system evaluation, the global CD accuracy of 9 nm and the global pattern positioning accuracy of 15 nm have been obtained. The overall performance of the HL-950M system has satisfied the specifications required for the 130 nm node reticle production and 100nm node reticle development.

We are focusing on a high-performance cleaning process with minimum use of chemicals. For the substitution of chemicals, the refined cleaning tools and process have been developed, which use the high-concentration ozonic together with hydrogen water. To optimize a cleaning process, we have evaluated the removal and decomposition efficiency of organic compounds on the mask surface, the optical degradation of Cr and Suicide materials and so on. In conclusion, the substitution of sulfuric acid, ammonia and other chemicals is available for practical cleaning process by combining their functional cleaning steps. Especially in the ArF generation, this cleaning technique was found to be promising for the reduction of optical-damage and chemical residues for mask patterns and as well as high-efficiency particle removal.

Use of accurate and repeatable endpoint detection during dry etch processing of photomask is very important for obtaining good mask mean-to-target and CD uniformity performance. It was found that the typical laser reflectivity endpoint detecting system used on photomask dry etch systems had several key limitations that caused unnecessary scrap and non-optimum image size performance. Consequently, work to develop and implement use of a more robust optical emission endpoint detection system for chrome dry etch processing of photomask was performed. Initial feasibility studies showed that the emission technique was sensitive enough to monitor pattern loadings on contact and via level masks down to 3 percent pattern coverage. Additional work was performed to further improve this to 1 percent pattern coverage by optimizing the endpoint detection parameters. Comparison studies of mask mean-to-target performance and CD uniformity were performed with the use of optical emission endpoint versus laser endpoint for masks built using TOK IP3600 and ZEP 7000 resist systems. It was found that an improvement in mean-to-target performance and CD uniformity was realized on several types of production masks. In addition, part-to-part endpoint time repeatability was found to be significantly improved with the use of optical emission endpoint.

The Cr etch rate is affected by Cr density to be etched at the photomask. Different mask-to-mask and within-mask pattern densities have made difficult to control the final CD. We have tested loading effect using binary Cr mask with ZEP7000 photoresist. The loading effect was evaluated for the masks fabricated at the various dry etch conditions with different within-mask Cr loading. The Cr etch rate and selectivity was observed at various process conditions and relations between parameters of dry etch process and Cr loading were evaluated. The horizontal and the vertical Cr etch rates were investigated and the process parameter dependence on the Cr loading was analyzed. The horizontal and the vertical photoresist etch rates were evaluated for the photoresist loading effect. The cause of mask-to-mask loading and within-mask loading are mainly from Cr loading and photoresists loading, respectively. The Cr loading is mainly affected by source power, pressure, and Cl₂/O₂ ratio. In our system, within-mask Cr loading is strongly dependent on the process parameters when the selectivity of Cr to PR is below 1. If uniformity and selectivity are acceptable, high DC bias, high ga flow, low pressure, and high Cl₂/O₂ ratio are recommended to reduce loading effect.

An overview will be presented of high-resolution e-beam lithography equipment issues and processes used in the fabrication of photomasks/reticles needed for 100nm maskmaking. As reported and discussed repeatedly, the emerging advanced optical and next generation lithography for 100nm and beyond requires masks with a well controlled CD variation and high pattern placement accuracy. Our paper shows the possibility of 100nm patterning by using standard resist materials (e.g. ZEP 7000) or other advanced resist materials under optimized processing exposed with a 50keV shaped-beam vector-scan Leica SB350MW mask writer e-beam pattern generator. The presented results will show that this commercially available e-beam system together with built-in exposure optimization methods (proximity, local heating, fogging) meets the challenges of the 100nm device generation with extendibility to at least 70nm. Details of the exposure optimization possibilities, including a flexible determination method of proximity input parameters and resist-pattern transfer methods maintaining the required CD-control will be discussed also.

Reticle cleaning is one of the most important processes in photomask making, because the smallest particles on reticle are supposed to be printable on wafer. Moreover, the requirement for reticle cleaning is stricter, because reticle should be zero-defect and there is no killer factor on it. It is facing difficult challenges as it enters new era of 100 nm pattern, introducing DUV lithography and phase shift materials. As defect sizes are decreasing to be controlled in cleaning process, the cleaning performance depends on not only conventional chemical treatment and megasonics but also a new IPA drying method such as direct- displacement IPA vapor dry. So we investigated the cleaning performance with different IPA drying methods by using quartz, chrome, MoSiON mask blanks and several test plates with 70 percent and 30 percent quartz area in main pattern field , such as conventional IPA dry and direct-displace IPA vapor dry , catgorized particle sizes and analyzed residual elements composition after cleaning of two systems. Effectiveness of cleaning with different drying methods on HT PSMs has been also investigated by controlling phase and transmittance of KrF half-tone phase shift mask(HT PSM), within +/- 3 degrees and +/- 0.3 percent respectively. Finally, direct-displacement IPA vapor dry method with traditional chemical treatment presents better removal rate of particles than conventional IPA dry when it comes to remove the smallest particles on quartz and chrome. It is found that direct-displacement IPA vapor dry for reticle cleaning would be considered to be the alternative dry method to control the smallest particles for the high-grade photomasks.

A new die-to-database reticle inspection system has been developed to meet the production requirements for 130nm node 4x reticles, as well as, the early inspection requirements for 100nm node 4x reticles. This new system is based on the TeraStarT platform1 developed recently by KLA-Tencor Corporation for high performance die-to-die and STARlightT inspection of 130nm node reticles. The TeraStar platform uses high-NA triple-beam scanning laser optics for high throughput. The platform also includes a new generation of defect detection algorithms and image processing hardware to inspect, with high sensitivity and low false detections, the small linewidths, aggressive OPC, and advanced EPSM 4x reticles characteristic of the 130nm node. The platform further includes the TeraProTM concurrent STARlight and die-to-die inspection mode for exceptional productivity. The necessary database elements have now been developed and added to the TeraStar platform, to give it die-to-database inspection capability. A new data format along with new data preparation, data rendering, and data modeling algorithms have been developed to allow high precision database matching with the optical image for exceptional die-to-database performance. The TeraPro high productivity features of the TeraStar platform have been extended to the die-to-database mode providing the opportunity to use STARlight and die-to-database modes concurrently.

The industry traditionally uses a single number, the change in the printed line width, to quantify mask defect printability. The measurement of this change is done in the direction perpendicular to a main feature, usually a line. We often ignore the extent of the printed defect parallel to the line even though our intuition tells us it will also contribute to the impact of the defect. If the lithography resolution improves the defects will be better resolved and their printed image will more closely approximate the shape of the defect. This leads to an increase in the line width change of the defect. This leads to very high defect printability in the case of high k1 lithographies, such as extreme ultraviolet lithography (EUVL). Thus, traditional methods of quantifying printability will lead to very stringent mask defect specs for capable lithographies with low mask error enhancement factors. We present an analysis of the electrical impact of gate layer defects and derive an expression that takes the printed defect extent in both directions into consideration. Since the printed defect extent parallel to the line depends on the lithography resolution and, therefore, the lithography process k1 factor, the electrical impact of the mask defect can be shown to be dependent on k1. Finally, we will present a mask defect criterion with explicit k1 dependence and discuss its implication to EUVL.

The paper presents results of a thorough study using the UV-based die-to-database mask inspection system ARIS^TM100i for the inspection of alternating phase shifting masks (AAPSM) designed for ArF (193nm) technology. Specially designed test masks were used to investigate sensitivity limitations of the i-line tool. Main focus is on phase errors, which were treated as a function of defect size, phase, and mask location. In addition, production reticles were inspected using a specially developed sensitivity AAPSM. Production issues like false defect rate and data preparation were addressed. The paper is concluded with a short printability analysis of different phase defects detected during the experiment.

Alternating phase shift masks (altPSM) are gaining importance as a reticle enhancement technique to meet the ITRS Litho Roadmap sub-130 nm node line widths. AltPSM fabrication usually involves etching of the quartz substrate in order to form the phase shift structures. Defects can arise during the quartz-etching step from imperfections in the resist image thereby causing various forms of phase shifting defects on the reticle. These reticle phase shift defects can result in printable defects on the wafer. In order to prevent wafer yield loss from occurring, it is necessary to detect and repair the reticle defects. A die-to-die inspection algorithm using simultaneous transmitted and reflected light signals was developed for the KLA-Tencor TeraStar SLF27 inspection system. The algorithm processes the transmitted and reflected light signals in parallel to detect both phase and chrome defects at high speed. One of the several challenges in the use of reflected light for pattern defect detection on alternating phase shift masks is to ignore lithographically insignificant mask process artifacts such as bright chrome 'halos' which may exhibit significant differences between adjacent die. This paper discusses the inspection challenges of alternating phase shift masks. Defect sensitivity characterization results from programmed phase defect reticles are presented.

Moore's law implies linear growth of integrated circuit density, but the micro-lithographic pattern density grows significantly faster than linear due to OPC embellishments. The progress of technology supporting this growth goes in small steps interleaved by substantial leaps. The leaps occur when the progress in the computing architecture falls behind the requirements from pattern complexity. An established technology can be optimized to a many times surprisingly large extent, but increasing demands eventually crosses the border that makes a given technological architecture inadequate and obsolete. Three major issues with micro-lithographic data processing demand new solutions. One is the need for raw computing power. The second is the data transport mechanisms, which must be designed to prevent bottlenecks. A third issue is the basic data structuring, i.e. the efficiency of the pattern data formats. Exploding reticle pattern complexity requires that backward compatibility with legacy formats is abandoned and that the efficiency of the data format is placed in focus. Micronic Laser Systems maintains a technological roadmap for modular and expandable parallel computing architectures, from data input and pre-processing, through fracturing to rasterizing.

As k1 factors decline, optical proximity correction (OPC) treatments required to maintain dimensional tolerances involve increasingly complex correction shapes. This translates to more detailed, larger mask pattern databases. Intricate, dense mask-layouts increase mask writing time and cost. OPC employment within a growing number of lithography layers compounds the issue, leading to skyrocketing mask-set costs and long turn-times. ASIC manufacturing, where average chip life cycles consume less than 500 wafers, is particularly hard hit by elevated mask manufacturing costs. OPC increases mask data mainly by adding geometric detail - serifs, hammerheads, jogs, etc - to the design layout. The vertex count, a measure of shape complexity, typically expands by a factor of 2 to 5, depending on OPC objectives and accuracy requirements. OPC can also increase hierarchic data file size through loss of hierarchic compression. In this paper we outline several alternatives for reducing OPC data base size and for making OPC layout configurations friendlier to mask fabrication tools. An underlying assumption is that there is an optimum OPC treatment dictated by the behavior of the process, and that approximations to this ideal involve trade-offs with OPC accuracy. To whatever extent OPC effectiveness can be maintained while accuracy is compromised, mask complexity can be reduced.

Many mask patterns contain small un-inspectable features (Inspection Rule Violations or IRVs) that create significant through-put time (TPT) impact at mask inspection due to excessive false defects. These small features include a) drawn test designs purposely intended to be small for evaluating process capabilities, and b) un-intended small features that result from errors such as overlap of designs, gaps between cells or synthesis errors. Typically, an IRV is a feature smaller than the minimum feature size capability of the mask inspection tool. This paper describes an integrated method to find such IRVs in the data and either fix them or declare that area as not inspectable. The method includes documented drawn size limits for inspectability, data checks at drawn level, data checks at post-fracture, and functions to define 'Do Not Inspect Regions (DNIRs)' for any remaining IRVs in the data. Data checking at post-fracture must comprehend Optical Proximity Correction (OPC), which generates small features that are not IRVs. The defined DNIRs are listed in the jobdeck for automated inspection data preparation with no engineering intervention. The result is improved mask inspection TPT as well as early detection and correction of certain design or synthesis errors.

In recent years mask data preparation (MDP) has been complicated by a number of factors, including the introduction of resolution enhancement technologies such as optical proximity correction (OPC) and phase shift masks. These complications not only have led to significant increases in file sizes and computer runtimes, but they have also created an urgent need for data management tools -- MDP automation. Current practices rely on point solutions to specific problems, such as OPC; use outdated, proprietary, non-standard, informal or inefficient data formats; and just barely manage portions of the data flow via low-level scripting. Without automation, MDP requires human intervention, which leads to longer cycle times and more errors. Without adequate data interchange formats, automation cannot succeed. This paper examines MDP processes and data formats, and suggests opportunities for improvement. Within the context of existing data formats, we examine the effect of inadequate (e.g., proprietary) data formats on MDP flow. We also examine the closest thing to an open, formal, standard data format--GDSII--and suggest improvements and even a replacement based on the extensible markup language (XML).

Mask data preparation has become a major concern in the supply chain from design to the fab. The mask industry is facing a number of problems induced by a massive introduction of OPC. Affecting the design flow the exponentially escalating data volume came into focus because the data-prep infrastructure fails to keep up with this development. As a consequence the turn around time from tape out to 'ready to write' data is permanently rising from a couple of hours 2 years ago to many days/weeks nowadays. Computation times of many days on modern workstations is no exception anymore. Especially when mask data have to be converted to another writing tools data format or just a mask manufacturing process has to be adapted by modifying the data bias, we encountered computing times of more than hundred hours for a single layer. We found a way to reduce these computation times by a factor of more than 100 by introducing distributed computing on a Linux based cluster.

This paper reviews four different strategies that can be used in the automated processing of photomask manufacturing data. The first of these is the automation of specific process steps such as the generation of Barcodes and Titling data, or specific software to perform format conversion, job deck generation or automated fracturing. The second strategy is the automation of complete flows that are specific to a customer or product type. This type of automation can be successfully built using the primitives developed by the first strategy. The third strategy is the automation of generic flow steps that are then applied to all customers. This is a much more powerful solution, but is significantly more demanding in the effort required for the design and implementation. The final strategy, the integration of automation over multiple complete supply chains is a desirable end game. The paper will report on the latest activities of the European Commission Fifth Framework project called Automatic Mask Order Processing System (AutoMOPS) that is developing a prototype implementation of a distributed server architecture that will allow automation and integration within the photomask manufacturing supply chain. The advantages and weaknesses of each of these techniques are reviewed using examples of automation which has been undertaken within Compugraphics over the previous decade. The interaction between these techniques is reviewed, as well as the evolution of solutions from each technique and the systems environment where these techniques are used.

Developing a tapeout automation system that works in a static environment where inputs and outputs can be defined - as in a vertically integrated Semiconductor Company - is relatively straightforward. In an environment with a large variety of inputs and outputs, a more versatile system must be developed. The key elements of such a system must be flexibility and ease of maintenance. In order to accomplish this, D2W has developed a software-independent suite of tools which employs a highly modular approach and dynamic variable substitution to enable everything from multi-processing to customer-specific documentation. This system routinely manages tapeout flows with several thousand variables in a highly accurate, high speed, fully automated mode. These tools have been developed and refined over a period of 10 years and deployed for tapeouts to more than 40 companies, implementing in excess of 100 technologies, and successfully interfacing with 14 or more commercial and captive mask shops worldwide

Nanomachining is a new technique to the semiconductor industry. This technique combines the positional control of an AFM and RAVE LLC's proprietary nanomachining head to perform material removal at nanometer levels. This is the first commercial application of this technology. Benefits of this technology as applied to photomask repair are discussed. Specifically, we address the use of this technique for removal of defects in quartz, chrome, MoSi, and various exotic materials. Emphasis is given to materials that provide significant challenges for the current industry standard repair techniques. Specifically, quartz bumps on alternating phase shift masks, trimming of carbon patches, and repairs within tight lines and spaces. Several advantages of the technique are illustrated, including the abilities to machine in tight geometries, approximate line edge slope for both wet and dry etched material, image with resolution exceeding today's needs, extend to future mask sizes and technologies NGL, develop custom repair processes and tips quickly, image and repair quartz bumps of nearly any size and shape, minimize surface damage, and achieve superior edge control and transmission. Statistical analysis is conducted on performance of the technique with respect to edge placement, transmission, and surface damage performance to specifications.

Manufacturing devices at the 100nm node presents new problems for the photomask metrologist. The metrologist is required to measure dense features with arbitrary line and space widths. While existing optical metrology tools are very successful at measuring isolated features with very high precision and repeatability, the conventional threshold algorithms exhibit Optical Proximity Effects (OPE) that affect the accuracy of CD measurements of both isolated and dense features. This paper presents a new CD metrology algorithm that is highly linear and largely insensitive to the influence of OPE while maintaining high precision and repeatability. The algorithm has been implemented on the new 244nm DUV optical metrology tool, the KMS-100. Demonstrated performance for the new algorithm on the DUV tool on binary masks shows better than 1.5nm, 3 sigma static repeatability down to 0.25um. Linearity, without multipoint calibration, is better than 5nm down to 0.25um for isolated lines. The OPE sensitivity (difference between measurements of isolated, dense and half isolated lines) for mask features down to 0.4um has been demonstrated to be better than 5nm over a wide range of dense lines and spaces widths.

Continually shrinking features sizes coupled with tighter tolerances for critical dimensions and feature placement necessitate development of new metrology tools that can meet the demand for more precision and accuracy during the measurement process. With this in mind Leica Microsystems has developed a next general metrology system that is capable of fulfilling both the feature placement and critical dimension metrology requirements. This paper contains a brief description of the new system hardware and design changes incorporated into the Leica LMS IPRO2 as well as recent measurement data indicative of initial tool performance.

Recently, interest in the use of scanning probe microscopes (SPM) for metrology applications has grown. SPM can provide detailed topographical maps of reticles and wafers from which much useful data can be extracted. For example, CD measurements very near the bottom of sidewalls can be determined. Sidewall angles can be measured non-destructively. Micro-trenching (micro-loading) in etched quartz features on APSM can be characterized, and quartz bumps can be volume mapped for accurate dose control on FIB repair tools. The main issue complicating the use of SPM for metrology is the effect of tip shape and tip wear on the measurement data. For example, features with nearly vertical surfaces, like sidewalls, can't be measured accurately with conical tips because SPM scans will actually measure the sidewall of the tip and not the feature. This study will qualitatively address the issues associated with tip shape effects and discuss methods being employed to reduce or eliminate them.

TO enable lithography at low k1 factors, OPC on photo masks is a method of strong and growing importance. But CD metrology of OPC features is suffering form several drawbacks: (1) OPC structures often do not have two parallel edges, which are required for usual CD metrology methods; (2) There are no commonly agreed standard definitions how and where to measure some types of OPC structures; (3) The CDs are very small; (4) There is no automated software for the measurement of OPC structures on operator level. A metrology method and a fully automated software for metrology of OPC structures based on LWM optical CD metrology tools is shown in this paper. It automatically distinguishes between hammerheads and serifs in various orientations. The method works analog to pitch measurements and requires only pitch calibration and no additional CD calibration. The results of light optical metrology tools with i-line and DUV wavelength is compared to CD SEM results.

At BACUS2000 this initiative towards a common use of terminology in photomask manufacturing and application, has been introduced. A proposed standard has been achieved for one-dimensional terminology, such as feature width uniformity, feature linearity, etc. The special approach of the document is that it includes a list of mandatory information to clarify a number given, e.g. as measurement result or as budget. The main target of the document is to serve as guideline for user-supplier communication in the field of photomasks. The present focus in the Task Force is on terminology for two-dimensional mask metrology. This includes corner rounding, line-end, shortening, edge roughness, etc. Such terms are already in use and described in literature, but a quantitative comparison is complicated without a full understanding of the technique and sample size used. In addition, the Task Force is discussing an approach by which the fidelity of a mask feature can be quantified. The challenge for use in benchmarking is to find a representative set of features. The suggested pattern fidelity quantification is a first step to allow an assessment of the printing performance of real reticles, taking limitations of the achieved pattern fidelity caused by the mask making process into account.

With the increased resolution of today's lithography processes, reticle pinhole defects are much more printable. Measuring the size of small pinholes using the current SEM method often produces erroneous results when compared to pinhole energy transmission. This is mainly due to the fact that SEMs do not accurately account for edge wall angle and partial filling which can dramatically reduce the pinhole transmission and subsequent printability. Since reticle inspection tools, like wafer steppers and scanners, use transmitted illumination, pinhole detection performance based upon top surface SEM defect sizing is often erroneous for small pinhole diameters. This study first uses simulation to predict printability. Then, a pinhole test reticle is developed with a variety of sub-200nm pinholes. The reticle pinholes are measured with an improved method incorporating transmission and imaged to wafer in order to assess printability.

As minimum semiconductor critical dimension feature sizes become smaller and smaller, many adverse effects in lithography printing due to mask topography start to stand out. These effects existed in the optical lithography in the past many generations. Usually, these effects contributed to a negligible depth of focus (DOF) consumption, and therefore, were neglected. In the case of Extreme Ultraviolet Lithography (EUVL), due to the drastic reduction in wavelength, some of these adverse effects that related to the wavelength tend to magnify in the case of EUVL as compared to the deep ultraviolet (DUV) lithography. For example, the asymmetry of Bossung curves and focus shift for semi-isolated to isolated lines is found to be much less in DUV optical lithography. However, in the case of EUVL, a maximum 40nm focus offset between the dense and the isolated lines exists. This focus shift effect in EUVL has been previously discussed by C. Krautschik, et al1 and explained via the complex phase behavior for the EUVL mask that is fundamentally different from the thin mask. In this paper, we will present a detailed and simpler explanation for the cause of the Bossung curve asymmetry and focus shift effect. Our simulation study indicated that the asymmetry and focus shift effect is simply due to a phase error at the mask pattern edge. This phase error is primarily caused by the interference of the reflected light from the reflective substrate with the diffracted light at the absorber edge or boundary and with the partially transmitted light from the absorber edge. This effect is not unique for the reflective masks; it exists in transmission masks as well. The analogy of this effect to the conventional thin transmission mask can be simply made and will also be discussed in detail.

For optical inspection of Extreme Ultraviolet Lithography (EUVL) masks using Deep Ultraviolet (DUV) light, contrast from reflected light is used to form the image of the mask and detect the defects. The inspectability of a patterned mask depends on the optical properties, surface conditions and thickness of absorber and buffer layer. The issue in EUVL mask inspection is the relatively low image contrast in the inspection tool because both the EUV-reflective and EUV-absorbing regions reflect DUV light. The need of a buffer layer to protect the multilayer (ML) reflector during mask processing and defect repair necessitates two inspections for a patterned mask: one with the buffer layer on to find the defect for repair and one with the buffer layer removed to qualify a final mask. Since the ML appears bright at DUV inspection wavelengths, the buffer layer is also chosen to give high reflectivity. Therefore, the absorber reflectivity must be low enough to provide high image contrast and to avoid the edge interference effect. Recently, we have developed a surface treatment process to reduce the reflectivity of absorber layer and result in a DUV contrast approaching 90 percent. This greatly improves the optical inspectability of EUVL mask to a level similar to conventional transmission mask. In this paper, we describe the overall EUVL mask inspection strategy and present a comprehensive discussion on mask optimization in materials selection and modification for high inspectability. We report the reflectivity of Mo-Si multilayer, buffer layers using SiO₂ and Ru, and absorber layers of Cr and TaN. We will demonstrate with DUV inspection images of the optimized EUVL masks that the image contrast and quality from reflected light are close to those of conventional photo-masks with transmitted light. This greatly enhanced EUVL mask inspectability will increase defect detectability for inspection tools and simplify image rendering in die-to-database inspection.

A CD-SEM was used to contaminate specific areas in dense line test structures on a 10x chrome on glass binary mask with e-beam induced deposition of hydrocarbons. Different degrees of contamination have been realised by varying the exposure time. Additionally, styrene was deposited with focussed ion beam (FIB) at different doses. The impact of the transmission loss caused by the deposited carbon was investigated by printing the manipulated test structures using Sematech's 157nm Exitech Micro Stepper and an experimental 157nm resist. Resist line width variations revealed the impact of the mask deposits on imaging. Additionally, simulations have been performed using 2D Kirchoff approximations in order to predict changes of the process windows and CD.

Electrostatic charge on reticles and adjacent objects is a growing and significant source of damage to reticles . Next generation exposure tools will likely employ vacuum ultraviolet light (157 nm.) to achieve improvements in spatial resolution. Because, air is opaque such light due to the presence of oxygen and water vapor , these exposure tools will need to operate in a nitrogen atmosphere. In order to benchmark the magnitude of static charge in 157 nm. exposure tools, the efficiency of tribocharging was measured in a test chamber with atmospheres of 10-60 percent RH air and in nitrogen. The data shows that the dependence of tribocharging on humidity is generally higher as humidity is decreased. Tribocharging in a nitrogen environment is different than in 10 percent RH air and is substantially higher than in the environment of a conventional air-filled stepper. That suggests that maintaining the safety of reticles in the 157 nm. lithography era will require a rigorous electrostatic management program.

We discussed the following topics at the panel discussion of Photomask Japan 2001. 1) Lithography roadmap from 130-nm to 90-nm node. 2) Lithography tool selection, KrF, ArF, or F₂ for each node. 3) Mask technology issues for ArF and F₂ lithography. 4) CD control and MEEF reduction. 5) OPC and PSM applications. Panelists agreed that critical issues for 100-nm lithography are CD control, defect control and mask cost. Mask suppliers presented potential solutions for these issues: improvement of mask writing tools, refinement of resist process etc. By solving these issues 100-nm lithography can be realized by 2004.

The Semiconductor Industry has been on a historic productivity growth curve that is due to the feature increase based on size reductions. The pace of technology introduction is accelerating as evidenced by the shortening of time from the introduction of the 180nm node and the introduction of the 130nm node. Historically, the introduction of new nodes had been on a three-year cycle. This raises the question of the impact of this acceleration on the manufacture of masks. This paper examines the impact on semiconductor masks by considering the process steps involved in manufacturing masks and the related cots and cycle time. As technology accelerates, the tools available may not maintain a similar pace of introduction. The consequences of this possible non-compliance with the technology acceleration will have an impact on the cost of masks. An example is employed to demonstrate the financial impact of the technology acceleration. Projections can be made of the continuing impact of technology acceleration on the mask manufacturing process. The conclusions drawn are that several identified, critical processes must be the focus of improvement to allow the industry to continue on the productivity growth curve.

The paper presents the use of the Linewidth Bias Monitor (LBM), the critical dimension (CD) uniformity mapping option of the ArisTM21i die-to-database mask inspection system, for mask process control and incoming quality control (IQC) in the wafer fab. LBM is qualified for this purposes by baselining it with CD measurements. Masks, provided by different commercial vendors, are evaluated based on the LBM maps obtained during mask inspection. Mean-to-target and 3-sigma values are evaluated and compared. The results are presented. In addition, a case, where LBM identified a killer CD variation during IQC is presented.

As mask specifications continually tighten with the ever- present progression of Moore's law, mask manufacturing specifications have become increasingly difficult to achieve. Global process optimization from coast to etch is critical for achieving the required mask performance. As an Applied Materials company, Etec is in a unique position within the maskmaking industry to introduce mask manufacturing solutions that are optimized across a number of process steps. Working with the Applied Materials photomask etch team, Etec's laser mask-patterning group characterized and implemented an integrated process recipe for the deep UV, raster-scan, continuous-wave, laser mask- patterning ALTA 4000 system and the Applied Materials Tetra Photomask Etch System.

As the chip making industry gearing up for mass production of 130nm device technology node, Critical Dimension (CD) control becomes ever more important. Among many sources of possible contributions, there is increasing trend that the contributions are being identified for mask making processes itself. For example, at 180nm node, mask contribution to CD control has been 40~45 percent while at 250nm node the contribution was < 20 percent. At 130nm node, it is expected that mask contribution to CD non-uniformity could reach > 60 percent if existing mask making processes are continue to be employed. 60~70 percent of CD non-uniformity contribution from mask is clearly not acceptable. Therefore, we have engaged with our mask suppliers to bring in 50-kV e-beam vector mask pattern generator and dry etch process quickly for critical levels of 130nm device technology node production ramp. In this paper, we will share wafer FAB experiences of quickly implementing the 50-kV vector e-beam pattern generator and dry etch process for 130nm device node ramp. We will be discussing benefits realized from this transition in terms of; mask and wafer pattern fidelity improvements, mask CD linearity Improvements, e-beam writer process resist tone effects, finally and most importantly, impact on the wafer level CD control; Across the Chip Linewidth Variation (ACLV) reductions.

For a lithography process with a design rule of 0.18 micrometers and beyond, the most critical issue is the gate critical dimension (CD) control because it affects the circuit performance especially for high-end logic devices directly. The gate CD variation is generally categorized into two folds. The first one is CD variation affected by optical and process proximity effects, which is pattern layout dependent errors and can be treated by automatic optical proximity effect correction (OPC). The second one is across chip line width variation (ACLV) caused by aberration of stepper/scanner exposure tools and mask writing error. Although both two have been studied in detail respectively, the composite errors are not studied sufficiently. This is because these errors can not necessarily be quantified for all the pattern layout configuration exists in the actual device chips. In this paper we will propose a new analysis method to quantify OPC performance and gauge capability of in-process quality control (IPQC) monitors. The method consists of two parts. The first is to verify validity of OPC by using IPQC monitor patterns and the second is to quantify gauge capability of the IPQC monitor patterns for representing ACLV. Our new analysis method is significantly effective and persuasive for verifying OPC performance as well as gauge capability of IPQC monitor patterns. It is also quite useful to optimize OPC parameters and methods to reduce ACLV that is most critical to obtain high-end logic devices with a design rule of 0.15 um and below.

Double exposure alternating phase-shift mask (alt-PSM) technology with ArF exposure was used in the 0.1 micrometers technology node for patterning logic devices with polysilicon gates ranging from 110nm to 60nm. A dual-trench mask fabrication process was developed in-house at TSMC, and controls for phase accuracy and intensity balance were established. Optical proximity correction (OPC) was performed on both binary masks and alt-PSM. Interactions between the binary and the PSM exposures were taking in to accounted during the correction. Using Model based OPC and a single calibrated resist model, the critical dimensions (CD) linearity can be ideally matched to the designed CD for duty ratio >= 1:1.5 for polygate logic product has been implemented exhibiting an enlarged DOF, good resist line edge roughness (LER), a d CD uniformity.

A new CD metrology system with 248 nanometer illumination is the subject of this paper. The system configuration and major component improvements is described. Test measurements on chrome-on-glass and attenuated phase shift masks were performed demonstrating improved CD linearity down to approximately 300 nm and long term repeatability performance in the 2 nm realm.

Today some IC manufacturers obtain finer circuit geometries by adding scatter bars (SB) to conventional binary masks as an efficient resolution enhancement technique (RET).1 These SB perform best when they are wide. However, to achieve better resolution and wider process windows modern stepper equipments feature lower wavelengths and higher numerical aperture lenses. These new steppers require narrower scatter bars to prevent them from printing on the wafer, and their effectiveness as a RET is diminishing as we follow the stepper technology 'roadmap'.

The main advantage of the double-exposure, alternating-aperture phase-shifting mask (AltPSM) technique is that a critical mask layer (e.g. poly gate) can be separated into two regions and the lithographic processes optimized for each separately. The most critical regions, the gates, are usually patterned by a dark-field AltPSM, as it provides the best patterning performance and CD-control for isolated and semi-dense gates. The less critical binary intensity mask defines the local interconnect lines and gate trim-out regions. However, as the technology rapidly moves into the sub-100 nm node and beyond, the local interconnects become critical as well. The binary trim mask will also need other resolution enhancement techniques (RET). RETs such as off-axis illumination (annular or quadrupole), in combination with optical proximity corrections (OPC), are required in order to improve process windows and CD-control on the interconnecting poly layer. These two masks require quite different lithography settings to achieve the optimum process performance for the 100-nm node. For example, while the AltPSM exposure will perform best under moderate or high numerical aperture (NA) and relatively low partial coherence, the trim mask patterning requires higher NA and higher partial coherence to resolve the 240nm pitches. At the same time, both masks show different optical proximity effects (OPE), which will require additional process optimization and correction by concurrently distributing OPC on the shifter and trim masks. In this paper, we present a full CMOS process optimization including illumination mode and proximity correction for both poly-layer images for the (sub-) 100nm node, using 193-nm lithography.

In this paper we introduce the concept and design of a novel phase shift mask technology, Polarized Phase Shift Mask (P:PSM). The P:PSM technology utilizes non-interference between orthogonally polarized light sources to avoid undesired destructive interference seen in conventional two-phase shift mask technology. Hence P:PSM solves the well-known 'phase edge' or 'phase conflict' problem. By obviating the 2nd exposure and 2nd mask in current Complementary Phase Shift Mask (C:PSM) technology, this single mask/single exposure technology offers significant advantages towards photolithography process as well as pattern design. We use examples of typical design and process difficulties associated with the C:PSM technology to illustrate the advantages of the P:PSM technology. We present preliminary aerial image simulation results that support the potential of this new reticle technology for enhanced design flexibility. We also propose possible mask structures and manufacturing methods for building a P:PSM.

Elimination of photomask defects requires identifying the sources of contaminants at each process step. Current industry practice is to perform defect inspection at the end of processing. This makes determining the source of defect generators extremely difficult. This paper presents data taken from inspections performed immediately following the principal processing steps done in photomask manufacture. The KLA-Tencor SLF27 TeraStar™ inspection tool was used to inspect a generic test pattern after developing, etching and stripping of the resist.

For the latest photomask fabrication, critical dimension (CD) control is required more for ArF lithography. To satisfy the requirement, Alternating Phase-Shifting Mask (Alt.PSM) is expected to be the most effective approach for resolution enhancement. We investigated the optimization of shifter structure and evaluated phase defect detectability for 130 to 100nm node ArF Alt.PSM. Considering the process and defect control, shifter trench type is the most popular approach. However, in order to achieve smaller CD on reticle, dual trench type becomes also necessary. Therefore, we investigated the performance of the two types of shifter structure, and we compared the optical characteristics. On the other hand, Using test reticles contained programmed phase defects of various shape and size, phase defect printability was analyzed with the Aerial Image Measurement System, MSM193, and phase defect detectability was evaluated with some inspection tools. As a result, the manufacturing technology of ArF Alt.PSM for 100nm node was established.

The need for higher yields on high-value masks has heightened the mask making industry's sensitivity to mask defects. Decreasing the number of mask defects has necessitated improvements in the material handling throughout the production line, and in particular, from mask writer to mask etcher. Already one of the cleanest mask pattern generating systems in the world, implementing a SMIF material-handling paradigm on the ALTA systems decreased the number of defects attributable to the mask writer. ALTA 3000 through ALTA 3700 systems, configured with the SMIF Material Handling upgrade, allow the user to choose between the use of SEMI standard E100-0200 reticle SMIF pods or legacy magazines for loading and unloading reticles. When using SMIF material handling exclusively in production mask manufacture, the number of observed mask defects dropped measurably. The decreased number of defects on the masks improves turn around time, yield, and can decrease the cost of mask manufacturing. Observed defect data will be presented for an ALTA 3500 system before and after the SMIF upgrade.

As integrated circuit manufacturing complexity continues to intensity, it becomes increasingly critical to verify reticle quality. In addition, since the capital investment required to stay ahead of the technology curve is so great, the extension of existing toolsets to accommodate next generation technology becomes more practical. Through the use of advanced reticles with various optical enhancement techniques, photolithographers have been able to extend the production capability of their existing tools. It has been shown that the traditional models of defect resolution or printability cannot be used. Mask errors have been enhanced by the fact that photolithography has been printing images considerably smaller than the exposure wavelength. From a manufacturing standpoint, reticle qualification requires inspection at incoming and on a regular basis thereafter. Several methods have been reported which detail the process and frequency of reticle inspections. A natural consequence of documented for verifying printability, such as AIMS, stepper simulation, etc. The purpose of this paper is to report on the success achieved in quickly verifying defect printability on wafers in a manufacturing environment using X-LINK, a software option for the KLA9x System Controller. This utility translates KLA-Tencor's reticle inspection reports to KLARF files such that defective sites can be analyzed on reticle or wafer review tools. In this study wafer review tools were used to drive directly to the wafer site(s) of printability concern. This paper reports on how this process was implemented to expedite reticle dispositioning and provide feedback for validating reticle specifications.

130nm design rule and 100nm design rule device fabrication bring a whole new challenge to the mask makers. The critically small k1 value and correspondingly large MEEF (Mask Error Enhancement Factor) value impose an ever-higher quality requirement on the reticles. The higher emphasis on time-to-market of the semiconductor business environment only complicates the matter further. Mask makers are not only required to supply higher quality reticles, but also in a shorter period of time. Since its introduction, the concept of simulating the stepper/scanner by software has steadily gained popularity as the potential solution to meet the challenge. The experimental result of the previous version of PASS (Printability Analysis Stepper Simulator) with the binary mask had shown promising results. However, people are expecting Attenuated Phase Shifting Mask (AttPSM) simulation capability, since AttPSM is currently the most commonly used reticles for the critical layers-the place where PASS is needed the most. PASS V2.X extends its stepper simulation capability to AttPSM. We have prepared AttPSM test masks having programmed for 180nm and 130nm design rules. Each defect area was inspected with KLA-Tencor's 365UV-HR inspection system to acquire defect coordinates and images, simulated with PASS using the images, simulated with AIMS and finally printed on wafer. In this study we discuss the results and see how these simulations and images correlate with each other.

Fabricating masks for extreme ultraviolet lithography (EUVL) is challenging. New design features have been introduced because of the high absorption of most materials at 13.4 nm and the small critical dimension (70 nm and below). The novel mask features introduced with EUVL include the reflective design, new film combinations, and stringent defect specifications. This paper focuses on one aspect of the mask build process that must be detected, understood, and minimized: defects. We obtain our EUV mask blanks with the multi-layers already in place. While the deposition of usable Mo/Si multi-layers is a challenge in itself, our pursuit of a clean EUV mask process begins with the buffer layer. From that point, the basic mechanics of the mask build is: deposit the buffer layer, deposit the absorber layer, apply and pattern the resist, and etch the absorber. The buffer layer is left to protect the multi-layers during inspection and repair. Careful attention to cleaning, inspection, and repair will be required to meet the ITRS Roadmap's 55 nm maximum defect size (at the 70 nm node). Our inspection methodology, defect data and repair options will be presented in detail.

The application of strong phase shift masks (PSM's) such as AAPSM and Chromeless using KrF 248-nm lithography is increasingly in demand for production of advanced devices at the 130 nm node and below. Implementation of dual exposure PSM technology is becoming widely accepted as a method to achieve sub-wavelength gate and contact layer resolution for microprocessors, DRAM and thin film heads. This requires a stable and repeatable phase-shift mask process that will perform for the wafer lithographer and is manufacturable using today's leading edge photomask fabrication methods. The focus of this study is the characterization of the photomask quartz etch process. The effect of the photomask's phase depth control and the quartz etch CD control will be examined. A comprehensive mask metrology study will be supplemented by lithography process latitude data, both simulation and experimentally based. The effect of fabricating the photomask quartz trenches using either resist or chrome defined etch masks will also be studied as well as the impact on lithography process latitude. A key goal of this study is the determination of a realistic specification for the quartz etch process required for leading- edge phase-shift photomasks.

In this paper we use simulations to establish the size of quartz defects we need to detect in alternating aperture phase shifting masks (altPSM) when imaged in high NA 248nm and 193nm 4X exposure systems. Such as those that will be used at the 130nm and 100nm technology nodes. Data will be presented showing that smaller defects in the center of the shifted space than at the edge of the space cause the allowable CD variation to be reached. It will be shown that the most sensitive position for a quartz defect in a shifted space is not at the edge or center of the space, but rather at a point between these two. We will then use advanced simulation techniques, that take into account the extra non-planar incident waves we must consider in 1X imaging, to establish how these defects are 'seen' by 1X actinic and non-actinic mask inspection systems. The relatively large effect upon the transmitted aerial image of a defect in an actinic inspection, especially for defects in the center of the shifted space, when compared to a non-actinic inspection will be shown.

A stage tracking function has been developed for a mask-scan EB mask writer. Position error of EB mask on an EB-mask-stage induces position error of projection beam on the EB-mask and the position of a writing pattern. The position of the EB-mask is measured by a laser interferometer. The shift from the aimed position is fed back to a mask selection deflection and a main deflection. The velocity of EB-mask stage and specimen-stage is also fed back to the deflection. The deflection control unit for the stage tracking has been made and the tracking function confirmed from the test memory of the unit. Using the unit, scanning writing patterns have been obtained with step and repeat stage mode.

In this paper we focus on a laser/dry etch mask process simulation. Using Mentor Graphics Calibre RET tool suite, we exploit the similarity between the image on laser based mask writers and the image on wafer steppers. Doing so, we adapt a 'Silicon process simulation' to a 'mask process simulation'. The mask process tuning is performed with Mentor test patterns and then we simulate the mask image of a 4x scale database. The result is saved as a 1x scale gds file and is used, in a normal way, for a 193nm lithography simulation. We notice a large difference between the aerial image of the 193nm lithography based on the database and the one based on the mask process simulation.

To solve very low throughput of e-beam writer, a new patterning method based on stepper, photomask repeater has been developed. For the KrF photomask repeater development we have modified a wafer-exposing stepper to expose photomasks. In this paper, we intended to clarify the feasibility of 0.15 micrometers generation mask fabrication with KrF photomask repeater. Interfield registration almost satisfied the 28 micrometers specification. Intra-field mis- registration was 10 nm in 18 mm by 18 mm field area and so we have to use a small field size and basically improve this intra-field mis-registration. CD uniformity could not meet the 13 nm specification. Though the evaluated results of KrF photomask repeater process have not satisfied the specification of 0.15 micrometers generation mask, we have found the mask fabrication with KrF photomask repeater is feasible with optimization of field and process, we have found the mask fabrication with KrF photomask repeater is feasible with optimization of field and process.

Contact hole definition in the resist image is investigated as a function of reticle fidelity. It is found that for typical levels of corner rounding on reticle features, whether manufactured using a laser or shaped e-beam mask writer, the printed resist image at wafer level is largely unaffected. The loss of definition, which is also seen in supporting simulations using perfectly formed reticle features, is defined by the resolution limit of the resolution limit of the optical system of the stepper rather than the quality of the photomask.

In both optical and electron beam raster scan imaging for mask making or direct write on wafer, graybeam techniques are used to create a small virtual address grid while maintaining a large physical address grid. Using simple simulations of aerial image formation as the summation of Gaussian spots, several important conclusions about the use of graybeam are made. Graybeam results in a non-linear variation in edge position with gray level, with the non- linearity increasing with larger physical address grid size. While this edge position deviation form non-linearity can be calibrated out of the writing tool, the calibration curve is process dependent. One problem with the use of graybeam is the reduction of image quality as expressed by the image log-slope. For the case of a physical address grid equal to half of the spot size, the worst case graybeam level has an image log-slope at the edge that is 20 percent less than the best case.

The cost of creating a photomask with tan electron-beam lithography is determined mainly by the writing time. The writing speed is limited by the resist heating distortions. The local temperature in the area of an e-beam may rise up to a few hundred degrees C, leading to critical dimensions (CD) distortion. It is possible to decrease the temperature by decreasing the Beam current density, or flash size, or by applying multipass exposure; however, this increases the writing time. This paper present an approach on how to optimize exposure parameters to keep the temperature rise within an acceptable range, and at the same time increase writing speed as much as possible. Bema current density, number of passes, and pattern coverage were examined. A commercially available TEMPTATION software tool was used for simulations. A writing strategy and parameters of a 50 kV variably shaped beam system were considered. This allowed us to maximize the throughput of photomask fabrication while keeping CD distortion within error budget.

The performance of KRS-XE, a low activation energy, chemically amplified resist designed specifically for mask making with electron beam lithography, has been extended in terms of its sensitivity, coated-film stability and etch resistance. By careful manipulation of resist composition, high sensitivity formulations have been generated that will allow exposure doses of less than 10 mC/cm2 with 50 keV electron beam tools. This sensitivity enhancement has been achieved without sacrificing the robust process latitude previously reported for this resist. The performance of this resist can be maintained, even in coated film form, for prolonged periods of time by careful packaging of the coated films. Additionally, formulations with etch resistance versus chlorine/oxygen plasma in excess of that of novolak-based resists have been generated by the incorporation of organometallic additives. The combination of these improvements leads to resist formulations that will allow the high resolution and throughput that is demanded for state-of-the art mask making applications.

The attenuated phase-shifting mask (Att. PSM) is one of the most useful technologies for sub-micron lithography.1) However, it is difficult to control the parameters such as phase or transmittance when a phase-shifting mask is applied to practical use. Also, to apply phase shift layer (MoSiON), it remains that affects several critical mask parameters including critical dimension (CD), sidewall slope and surface damage. So, in this paper, the effects of added Cl₂ gas, DC bias voltage on the etch characteristics were studied using an inductively coupled CF₄-based plasma. The plasma characteristics and etch properties of inductively coupled CF₄O₂He and Cl₂CF₄O₂He Plasmas were investigated on the etch properties of MoSiON. Each added gas had a unique property on the etch rate, anisotropy, surface roughness and sidewall morphology. As the results of experiment, the most vertical profile and smooth surface were obtained using the 10 sccm Cl2, -200V dc bias. By increasing the dc bias voltage, the undercut on MoSiON layer is not occurred. When plentiful Cl₂ gas was added to the CF₄O₂He plasma, surface roughness was decreased but the edge of Cr slope was damaged at 15 sccm Cl₂. It is suggested from the results of this experiment that the pattern profile and surface roughness on MoSiON layer can be controlled by both quantity of Cl2 gas and dc self-bias voltage.

As photomask making procedures extend to more and more complex and difficult, the detected numbers of the quartz defects are increasing trend. These kinds of defects have been less detected frequently or not detected before. But, it can be found enough now because inspection machines are developed high resolution, short wavelength light source and low pixel size to find small size defects. Defect shapes and sizes detected by inspection machine are evaluated and classified to several types with SEM and then analyzed the wafer printing result with transmission data of the inspection and AIMS simulation result. By this analyzed result, the judge reference of the quartz defect was provided when the defect was detected by inspection machine during producing photomask. This will improve mask yield by reducing mask reject ratio classified blank mask defect problems.

Fabrication of 130nm and below technology node photomasks favors EBeam chemically amplified resist (CAR) due to its higher sensitivity, contrast and resolution. However, chemically amplified resist is in general much more sensitive to the environment compared to conventional resists such as PBS and ZEP7000. Coated CAR blank shelf life will have a major impact on CD control of high-end photomask manufacturing especially for extended delay situations. This paper presents blank supplier packaging methods and rawstock storage conditions and their impact on CAR blank shelf life in the photomask fabrication facility. We selected one of the top chemically amplified e-beam resists for this study.

General algorithms of contour tracing are just for binary image, and fail in some complicated images. These algorithms are correct just in some ordinary cases. The reasons of failing are always the lack of theory and the pixel is not enough for contour tracing. The theory of crack brought by A.Rosenfeld is very useful for contour tracing. But the crack is not intuitionistic. So, a new pixel-based algorithm of contour tracing for multi-value segmented image is presented by using the character of crack. After analyzing all cases that maybe occur in contour tracing, this paper summarized a succinct theory. As we know, the contours maybe superpose and intersect, so the same pixel maybe occurs several times in contour tracing, but the corresponding crack is unique, if we find the crack, then the corresponding pixel is found. That is the idea of the paper. The new algorithm is easy and accurate compared the traditional algorithms. In addition, this paper analyzed all relations that maybe occur between regions, pointed a effective algorithm of analyzing the inclusion relations among the regions to build the tree structure. The former algorithms fail in analyzing the tree structure of multi-value segmented image, but the algorithm is effective in all case. Experiments show that these algorithms are correct and high-effective.

Contact printing has been used for decades in many various lithography applications in the microelectronic industry. While vacuum contact printing processes offer sub-micron resolution and high throughput, they often suffer from some important drawbacks. One of the most common problems is degradation in both resolution and defect density which occurs when the same mask si used for multiple exposures without frequent mask cleans. This is largely due to the relatively high surface energy of both quartz and chrome and the tendency of most photoresists to adhere to these surfaces. As a result, when a mask and wafer are pressed into intimate contact, resist will tend to stick to the mask creating a defect on the wafer, effectively propagating defects to subsequent wafers. In this study, DuPont Teflon AF 1601S is used as a photomask coating and evaluated for its ability to act as a release agent and reduce defects while maintaining resolution for multiple exposures. Teflon AF is an amorphous, transparent, low surface energy, polymeric material that can be spin coated into a thin conformal film. Tests have shown that when using an uncoated mask in vacuum contact, resolution of 0.75 micrometers dense lines is severely degraded after less than 10 consecutive exposures. However, when the mask is coated, 0.75 micrometers dense lines were successfully resolved using vacuum contact for over 200 exposures without cleaning. In addition, it has been demonstrated that Teflon AF coatings impart to a mask a self-cleaning capability, since particles tend to stick to the photoresist rather than the mask. A coated mask, which was purposefully contaminated with particulates, resolved 0.75 micrometers dense lines on all but the first wafer of a series of 25 consecutive exposures. The patented mask releases layer process has successfully been demonstrated with a positive novolak resist. Additional data which describes the system chemistry, dilution and coating process, and film morphology are also presented.

CO₂ snow cleaning technology has demonstrated the ability to clean a variety of contamination types in a non damaging, environmentally friendly manner. CO₂ snow cleaning methods have been used to clean both particles and light organics and currently can be found in a variety of high tech industries to include, semiconductor (Si and GaAs), flat panel display, disk head and media manufacturing, and fiber optics. This paper offers an introduction to basic CO₂ properties and cleaning methods in general and photomask cleaning in particular. Focus will be placed on the CO₂ snow cleaning method to include: the snow making process, process parameters, process issues, contaminant types, CO₂ sources and specification, and safety. A new CO₂ snow system to clean current and next generation photomask substrates has been developed and is currently being tested. Machine specifics, process parameters, process issues, and cleaning data, will be discussed in detail.

As the design rule is rapidly decreased, tighter critical dimension (CD) control is highly requested. Considering the mask error enchantment factor, higher mask quality below 8nm should be guaranteed for 0.10micrometers generation devices. Among a number of actors causing CD errors in e-beam mask fabrication, dry etching plays an important role. Therefore, it is necessary to reduce loading effect for accurate CD control. As the loading effect in the dry etching is closely related to the selectivity of Cr to resist, a clue to reduce the loading effect is to reduce loading. In this paper, we will clarify the relation mechanism between the selectivity and loading effect. We will investigate the degree of loading effect by quantifying the selectivity with different etch processes.

Endpoint measurement sensitivity requirements in photomask can make or break an etch. The exposed chrome on today's photomask can vary between 0.25 percent and approximately 50 percent. Although excessive overetch does not deleteriously impact the underlying quartz, accurate endpoint detection is essential for preserving the critical dimension (CD) and CD uniformity across the mask. In order to provide a strong endpoint solution for photomask etch, a systematic investigation of etches with varying chrome loads was conducted. Passive monitoring of the optical emission spectra does not impact or interfere with the etch process. Also this method does not need specified endpoint sites on the mask as interferometric methods and provides an integrated endpoint signal over the whole mask area independent of the chrome clearing pattern. Two strong candidate wavelengths for calling endpoint in chrome etch were identified. However, optical emission spectroscopy endpoint detection has two drawbacks, which have historically limited its applicability. Firstly, the exposed area may be too low and/or secondly, the etch rate may be too slow for detection. Both of these concerns have been addressed in this paper by varying the exposed area on the photomasks from 0.25 percent to 99 percent. Endpoint was easily detected even for the slowest possible etch rate and for low exposed area.

Shrinking design rules, optical proximity correction and advanced phase shifting techniques require new methods of photomask manufacturing. The Applied Materials Centura photomask etch chamber leverages Applied Materials' extensive etch experience to provide an innovative dry etch solution to the mask dry etch challenges for < 0.13 micrometers device generations. Repeatable, consistent, stable etch performance is critical for advanced mask manufacturing. An extended chamber matching and repeatability study for chrome etch found that stable chrome and photoresist etch rates (and therefore selectivities) are produced on the Applied Materials Centura photomask etch chamber. The etch responses are consistent mask to mask as well as chamber to chamber. Prior to the extended study, pumping efficiencies, RF source and bias calibrations and optical emission spectral responses were compared. Since the study was performed at several different sites, the metrology tools were calibrated using masks specifically designed for this purpose. The marathon testing illustrates the stable etch performance over time.

The continuous shrinking of design rules results in tighter specifications for advanced chrome dry etch. Specifically, the increasing number of OPC and phase shift layers in mask set for sub 0.13 micrometers technology drives research and development in this area. Chrome layers were traditionally dry etched using a Cl₂O₂He plasma. While this chemistry has proven to meet the chrome etch requirements in the past its limitations are becoming more and more obvious. In particular, critical dimension control in terms of uniformity and etch bias shows opposing trend lines with the standard chemistry which makes optimization difficult and minimizes the available process space. The Applied Materials Centura photomask etch chamber has been used along with new gas chemistries to provide improved critical dimension control in chrome for binary photomasks. Oxygen and chlorine are responsible for etching chrome. However, these gases alone do not provide the sidewall protection necessary for the excellent critical dimension control required for advanced mask making for 0.13 micrometers and below. In this systematic investigation, experiments show a factor of two improvement in etch bias over the standard chemistry (He/O₂Cl₂). Excellent CD uniformity is also demonstrated.

Meeting the stringent error budget of 157-nm lithography for manufacturing devices in the sub-100 nm regime requires that all mask-related distortions be minimized, corrected, or eliminated. Sources include the pellicle system, which has been previously identified as a potential cause of image placement error. To characterize pellicle-induced distortions, finite element (FE) models have been developed to simulate system fabrication, including soft pellicles as well as prototype fused silica (hard) pellicles. The main sources of distortions are: (a) temperature variations, (b) initially distorted components, and (c) sag-induced refraction. Temperature variations are an issue if pellicle mounting and exposure take place at different temperatures. Sources of attachment-induced distortions include the initial frame curvature, initial reticle shape, attachment method (mounting tools-induced), frame and gasket materials, and the hard pellicle bow. These attachment-induced distortions were modeled using experimentally measured values of Young's modulus for adhesive gaskets. Refraction aberration is an issue with bowed hard pellicles which act as optical elements and induce image degradation. These effects were assessed and found to be significant. Results from the experiments and comprehensive FE simulations have characterized the relative importance of the principal sources of pellicle-induced photomask distortions for 157-nm lithography.

As integrated circuits require smaller lines to provide the memory and processing capability for tomorrow's marketplace, the photomask industry is adopting higher contrast resists to improve photomask lithography. Photomask yield for several high-contrast resist recipes may be improved by coating masks at the mask shop. When coating at a mask shop, an effective method is available that uses coat/bake cluster tools to ensure blanks are clean prior to coating. Many high-contrast resists are available, and some are more susceptible to time-dependent performance factors than conventional resists. One of these factors is the time between coating and writing. Although future methods may reduce the impact of this factor, one current trend is to reduce this time by coating plates at the mask shop just prior to writing. Establishing an effective process to clean blanks prior to coating is necessary for product quality control and is a new task that is critical for maskmakers who previously purchased mask plates but have decided to begin coating them within their facility. This paper provides a strategy and method to be used within coat/bake cluster tools to remove particle contamination from mask blanks. The process uses excimer-UV ionizing radiation and ozone to remove organic contaminants, and then uses a wet process combined with megasonic agitation, surfactant, and spin forces. Megasonic agitation with surfactant lifts up particles, while the convective outflow of water enhances centripetal shear without accumulating harmful charge.

The traditional mask making process uses chain scission-type resists such as PBS, poly(butene-1-sulfone), and ZEP, poly(methyl a-chloroacrylate-co-a-methylstyrene) for making masks with dimensions greater than 180nm. PBS resist requires a wet etch process to produce patterns in chrome. ZEP was employed for dry etch processing to meet the requirements of shrinking dimensions, optical proximity corrections and phase shift masks. However, ZEP offers low contrast, marginal etch resistance, organic solvent development, and concerns regarding resist heating with its high dose requirements1. Chemically Amplified Resist (CAR) systems are a very good choice for dimensions less than 180nm because of their high sensitivity and contrast, high resolution, dry etch resistance, aqueous development, and process latitude2. KRS-XE was developed as a high contrast CA resist based on ketal protecting groups that eliminate the need for post exposure bake (PEB). This resist can be used for a variety of electron beam exposures, and improves the capability to fabricate masks for devices smaller than 180nm. Many factors influence the performance of resists in mask making such as post apply bake, exposure dose, resist develop, and post exposure bake. These items will be discussed as well as the use of reactive ion etching (RIE) selectivity and pattern transfer.

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In order to provide a platform for the industry, we have been working on positive-working CAR screening by joint-works with resist-makers. In this paper, firstly, we did validation of a technique 'dark erosion analysis by excess develop' on our latest benchmark CAR C-2, to re-introduce our baking optimization technique to all the blanks users. The baking condition described by the technique (the sweet spot) certainly provided us a superior pattern profile, a longer blanks life, and better sensitivity stability for PEB time. To find a CAR that exceeds C-2 performance, we continued CAR screening. A CAR with 'less-footing' and 'high-sensitivity' was found, however, it had still a difficulty of terrible 'spray-damages' due to insufficient remaining thickness after develop. Desiccant (silica-gel) worked significantly to extend CAR blanks life, however, we found that it was not available for practical use unfortunately due to excess particle contamination during shipment. As a technique to solve 'spray-develop damage' issue, it was certainly effective to form a protection layer, and aqueous TAR over-coating layer could be an option to prevent resists film from the spray-damages. Finally, we reported negative-working CARs screening results. And some negative CARs were superior to the most popular one today for sensitivity or pattern profile, however, they had a difficulty of excess-undercut.

TO enable efficient transformation of layout data to Electron Beam lithography drawing data in production, we have developed an automatic parallel-processing fracturing system named Tribune. Tribune can effectively use both parallel and hierarchical processing together to maximize the fracturing performance to easily handle large amounts of layout data. Tribune is designed to effectively use both parallel and hierarchical methods with the aid of cell information known by layout designers. A new fracturing algorithm is employed which fractures patterns whose width is wider than specified critical dimensions to minimize the number of tiny geometries for the improvement of pattern fidelity.

Semiconductor manufacturing has become a global business, in which companies of different size unite in virtual enterprises to meet new opportunities. Therefore Mask manufacturing is a key business, but mask ordering is a complex process and is always critical regarding design to market time, even though mask complexity and customer base are increasing using a wide variety of different mask order forms which are frequently faulty and very seldom complete. This is effectively blocking agile manufacturing and can tie wafer fabs to a single mask The goal of the project is elimination of the order verification through paperless, electronically linked information sharing/exchange between chip design, mask production and production stages, which will allow automation of the mask preparation. To cover these new techniques and their specifications as well as the common ones with automated tools a special generic Meta-model will be generated, based on the current standards for mask specifications, including the requirements from the involved partners (Alcatel Microelectronics, Altis, Compugraphics, Infineon, Nimble, Sigma-C), the project works out a pre-normative standard. The paper presents the current status of work. This work is partly funded by the Commission of the European Union under the Fifth Framework project IST-1999-10332 AutoMOPS.

To process 0.13 micrometers designs and below, a new data processing flow has been implemented at STMicroelectronics Crolles based on the Mentor Graphics suite. To deal more easily with model-based corrections and additional verifications on critical layers a separation of the design database in critical and non-critical layers has been introduced. The resist model and the correction parameters are developed in an iterative way. File sizes and data processing time are the main issues in the mask data preparation. The impact on mask manufacturing has been also illustrated in this paper.

As we move towards smaller dimensions and denser circuits, Model Based OPC has become a critical and indispensable tool to achieve feature fidelity for random logic and very small bitcell patterns. Model-Based OPC s used to overcome the effects due to the reticle manufacturing process and the photolithography process which are essentially low pass filters, with the objective of returning the intended drawn feature on wafer within acceptable error. In this paper we demonstrate its capabilities and flexibility with the development of a mixed Model-based/Rule based OPC approach that covers all categories of features for the active layer and the heuristics that justify this approach. We discuss along with experimental results the parameterized variations that are possible with Model Based OPC (MBOPC)and the optimization required as a result within the paradigm of a 248nm-lithography process for the 0.13-micron technology. Data and manufacturability issues are discussed that are an important consideration for a feasible MBOPC solution.

We describe a mask data preparation (MDP) flow using GDSII data. We describe why this flow is minimally disruptive, flexible, and efficient. The mask floor-planning composition can be stored in GDSII so that all layout data is in the same format. We describe how GDSII data can be hierarchically fractured. We use a technique involving the optimal determination of 'cover cells'. Use of cover cell placements allows a large reduction in runtime and data volume. In one case, we fractured a very large design with assist bars and OPC to a 28 GB MEBES mode 5 file. After application of cover cells, the same data fractures to roughly 360 MB -- a reduction of more than 75x.

Data preparation of photomask layout has become a major issue of mask making. As model-based OPC becomes a compulsory technology for advanced manufacturing processes, photolithography engineers encounter the issue in data preparation of photomask layout - the file size after-OPC treatment is much larger than original file size. Consequence of large file size leads to difficult manipulation of database such as longer OPC run time and larger disk space, which challenges computer system and software tools, etc. Part of file-size expansion arises from the nature of current methodology, which is caused by fragmentation of polygon edges. However, still part of expansion is unnecessary, because some unintentional layout is sent into an OPC engine. If any given OPC engine is fed with unintentional layout features produced after OPC is applied on layouts, a systematic 'smoothing' algorithm is developed to apply on a real chip. Any algorithms that scan through polygons for each type of defects would be unavoidable to scan the whole layout many times. The algorithm introduced here does not try to fix different kinds of polygon 'defects' one by one. The key is different kinds of defects are reduced to a few categories. The performance can be expected because polygons are scanned through fewer times. After the treatment, the numbers of polygon vertices becomes less. The new database is also more OPC friendly.

An alternating phase shift mask technique is one of the candidates to extend the KrF excimer laser lithography generation. One of the issues for practical fabrication of Alt-PSMs is a repair of quartz bump defects. A conventional focused-ion beam (FIB) repair technique has been investigated for quartz bump defect etching using (beta) -gas which has been introduced as a gas assist etching gas for MoSi based att-PSMs. We have prepared dual trench type alt- PSMs, which have programmed defects with various heights and sizes. Inspection and printability results are presented using these programmed defects masks. First, visibility of defects on a repair system is confirmed because the FIB repair system uses secondary Si ion for pattern imaging. Secondly, we have optimized parameters for quartz etching rate control with evaluation for etching depth accuracy and depth of riverbed. Thirdly, transmittance and printability of repaired point are confirmed with AIMS and wafer exposure experiments. This paper discusses feasibility of FIB repair of alt-PSMs in terms of limitation of small quartz bump defect visibility, quartz etching rate repeatability and printability of repaired points.

The paper presents the inspection of embedded attenuated phase shift masks for the 193nm lithography generation using UV-based mask inspection systems. Production issues like light calibration due to the existence of different transmissions on the mask and halftone-specific inspection sensitivity settings are discussed. A mask inspection example is presented and the most severe defect types are analyzed. In addition, the mask is investigated using the Linewidth Bias Monitor (LBM) option of the inspection system used, which provides a critical dimension (CD) uniformity map of the entire mask.

Binary (Chromium) and, KrF/ArF phase shift masks (PSM) were inspected by MC-3000, which uses DUV (257nm) light source, and an evaluated results of these sensitivities are shown. In the case of the chromium mask, sufficient detection sensitivity for 130nm-device inspection was obtained. For KrF and ArF phase shift masks, the detection sensitivities of the edge and the corner areas are practically equivalent to that of chromium. Though the detection sensitivity of a minute pinhole is slightly lower under the influence of the diffracted light. With an ArF phase shift mask, the contrast of absorber and a glass portion is low, and so improvement of the signal noise ratio of a sensor becomes essential for false-defect control. Additionally, the minute pinhole detection sensitivity will be higher, if a reflective inspection etc. is carried out.

As high-speed non-memory devices require narrow gate widths of less than 100 nm, the technology for this requirement shou7ld be guaranteed. In view of microlithography, one candidate to support such a narrow gate width is a phase edge (PE) PSM technique. However, because this PEPSM technique has not yet been thoroughly developed in the viewpoint of mask making, an activity to find optimal mask parameters for best optical performances should be made. In this paper, optical performances of PEPSM have been described under various geometrical structures and phase defects as mask parameters. Optical performances of PEPSM were strongly dependent on the pattern pitch, the optimal phase, and the mask structure. From our studies, the optimal phase of shifter was considered to be 179 degrees and the optimal mask structure expressed in dry/wet etch ratio was 50/130 degrees when considering the overall pitch. The phase defect having its phase of less than 50 percent did not seriously affect the lithography patterning. We could easily make PEPSMs having maximum phase defects of 50 degrees with our hybrid etch process. Finally, we could build the manufacturing process of PEPSM for sub-100 nm resist CD patterning.

Repair and printability of 193nm alternating aperture phase shift masks have been studied in detail in an effort to understand the overall production capability of these masks for wafer production at the 100nm node and below.

Recent observations indicate that wafer CD control for the 0.13-micrometers node is sensitive to non-phase defects between 0.1 micrometers and 0.25 micrometers on a 4X reticle, as a function of the location of the sub-killer defect. Since more and more small defects can be detected by today's advanced mask defect inspection tools, it is important to determine whether these detected defects can impact wafer lithography process window. The experimental result is based on a typical 0.13-micrometers process using a pre-designed Defects Sensitivity Monitor reticle to address the printability of these programmed defects.

The paper discusses the approach of using single detector system to classify the photo resist surface using different signal and image processing methodologies. We couple the understanding of the physical phenomenon and come up with an integrated method to generally classify the surface depending upon the side wall curvature. Construction of 3-D image of the surface and extracting features from the methods to classify the surfaces are the predominant aspects of the approach. We have used several methods to serve the purpose including the wavelet filters in edge and surface roughness detection. In this paper, non-stereoscopic 3-D shape reconstruction method is applied to address a difficult inverse problem in semiconductor fabrication metrology. The problem is that of deducing a chip's vertical cross-section from two-dimensional top-down scanning electron microscope images of the chip surface. Our results are illustrated with a variety of real data sets. In semiconductor chip fabrication, photo resistive material is used as an overlay, which will protect substrate areas (typically metal), which must remain on the chip after other unprotected substrate areas are etched off. The shape and size of the photo-resist material, at the submicron level, is therefore largely responsible for the shape and quality of the protected substrate. Critical dimension scanning electron microscopy (SEM) is used to determine this shape, and the research addressed in this paper proposes an image processing approach combined with physical modeling, to accurately obtain surface shape information from SEM imaging.

This paper describes a novel non-contact capacitive-sensor metrology tool developed for chrome photomasks. This work further describes suitable types of test structures printed on photomasks appropriate for linewidth metrology. The Critical Dimension (CD) metrology sensor is developed using a Low Temperature Co-Fired Ceramic (LTCC) technology to reduce the effects of parasitic capacitances. The sensor is based on non-contact micro-capacitance measurements of features on chrome-on-glass reticles. The CD-extraction algorithms based on the capacitance measurements are formulated from extensive evaluation with a Maxwell simulator. The purpose of the non-contact micro-capacitance sensor is to measure chrome-feature linewidths in the range of 0.4 (mu) M - 0.5 micrometers . These dimensions correspond to a 0.18 micrometers process on a 4X mask.

We have developed a novel EB lithography simulator, which can analyze imaging quality such as Line Edge Roughness (LER), pattern distortion, and corner rounding for the mask fabrication process. The simulator has a direct Monte Carlo calculation mode with unequal mesh dividing, works on cluster PCs hardware, and installs an exact Chemically Amplification Resist (CAR) reaction model. The simulation analysis line and contact hole patterns clarify that intrinsic LER induced by electron scattering is dependent on the exposure dose below 10uC/cm2 and has strong dependence on diffusion length. Moreover, the simulation identify that there is an optimum point around 10uC/cm2 of sensitivity and 30nm of diffusion length, considering corner rounding effect. The developed simulator demonstrates that direct Monte Carlo simulation can analyze the imaging quality of mask pattern quantitatively and practically, and has the potential to be a mainstream for EB lithography simulation.

As critical features continue to shrink, image fidelity on a wafer becomes even more important to the performance of an integrated circuit. There are several strategies that are typically employed to produce the best possible features. These include OPC, off-axis illumination and the ever-increasing numerical aperture, neglecting the pattern fidelity of the reticle. Several methodologies exist to characterize the fidelity of these features on both wafer and reticle. This paper will attempt to correlate the area measurements of contacts from a reticle using a scanning electron microscope, an automated visual inspection measurement system and an image based algorithm; and discuss their practical applications for manufacturing.

Electron beam projection lithography (EPL) using stencil masks is one of the most promising techniques in 50-70-nm- node lithography. However, in most real situations, stencil masks have to be divided into two complementary masks due to the 'doughnut pattern' problem as well as mechanical problems. This paper describes our complementary mask-data generation method that uses a pattern operation tool for conventional design-rule checking (DRC) and a phase-shift- mask (PSM) general tool, both of which are made by Mentor Graphics. Layout patterns are divided into pieces with the DRC tool and the pieces are alternately distributed between two layers with the PSM generation tool. The advantages of using these commercial DA tools include a high processing speed based on the maintenance of a hierarchical data structure, high reliability, and flexibility in changing generation rules. We used this method for metal-layer data of a 14 X 14-mm test chip. Although the original data included more than 3000 doughnut patterns, the obtained complementary data had no doughnut patterns. The aperture densities of the two complementary masks were almost equal. Because the CPU time required for data generation was about 20 minutes with a 500-MHz PC having 256-Mbyte memory, we believe that the proposed method is a valuable tool for complementary mask-data generation.

To meet critical dimension control error budgets for extreme UV lithography (EUVL) tools, the reflectivity bandpass of multilayers on the mask must be well matched to the bandpass of the optical system in the exposure tool. The reflectivity bandpass and peak reflectivity of the mask multilayers must also be highly uniform to minimize illumination uniformity errors in the exposure tool Calculations were performed to determine the required mask multilayer matching to exposure tool optics. Calculated ideal reflectivity curves and measured reflectivity versus wavelength values for typical masks made with ion beam sputtering and for the coating on the optics for the ETS were used. The impact on the mask coating requirements when using more than 6 multilayer- coated optics in production exposure tools was also quantified. To meet error budgets established for the ETS, the mask multilayer coating centroid wavelength at all points in the image field should be 13.334 +/- 0.040 nm, and peak reflectivity must be uniform to within +/- 0.5 percent absolute. A roadmap is proposed for mask multilayer reflectivity requirements for future industry roadmap nodes.

Fabrication of masks for EUVL requires the formation and patterning of both repair buffer and EUV absorber layers on top of a molybdenum/silicon multi-layer substrate. Films used for buffer and absorber should have low stress, good uniformity and good etch selectivity to underlying layers. Low stress chromium and tantalum nitride absorber film deposition processes have been developed and characterized on fused silica substrates at the MCoC. Sputtered silicon oxide was used as the buffer layer for work reported in this paper. This paper describes the results of EUVL mask processing at the MCoC, including deposition and etch capabilities of these films. Properties of the low stress chromium and tantalum nitride materials will be discussed, including stoichiometry, stress, uniformity and density. The chromium and tantalum nitride films have been integrated into a mask patterning process with a silicon oxide buffer layer. Etch bias and etch profiles from the two absorber films along with etch selectivities to the underlying silicon oxide layer will be presented. Image size results for both types of absorber layers will be presented, including the improvement in etch bias using the low stress chromium Complete EUVL masks with 160 nm feature sizes have been fabricated with these processes and micrographs of nested lines and elbows will be presented.

Nikon, in collaboration with IBM, has been developing EB stepper, which is the electron beam projection lithography (EPL) system for 70 nm node generation and below. As the standard reticle for EB stepper, the scattering silicon stencil type is used to obtain highest performance. The EB reticle has thin silicon membranes of thickness 2 micrometers and membrane size 1.13 mm square with stencil opening patterns, which are supported by a grid-grillage structure. The development of the EB reticle is one of key issues in the EB stepper development. We had accomplished 76nm reticle development using silicon-on-insulator wafer with a stress- controlled membrane. Now we are in the 200 mm reticle development phase. We have curried out experiments in cleaning, inspection and repair for the EB reticle, which are very important issues for the EB reticle fabrication. We showed possibilities of Ar aerosol cleaning, a reticle repair using Focused Ion Beam, pattern defect inspection with DUV microscope and so on.

The acceleration of the International Technology Roadmap for Semiconductors (ITRS) is placing significant pressure on the industry's infrastructure, particularly the lithography equipment. As recently as 1997, there was no optical solution offered past the 130 nm design node. The current roadmap has the 65 nm node (reduced from 70 nm) pulled in one year to 2007. Both 248 nm and 193 nm wavelength lithography tools will be pushed to their practical resolution limits in the near term. Very high numerical aperture (NA) 193 nm exposure tools in conjunction with resolution enhancement techniques (RET) will postpone the requirement for 157 nm lithography in manufacturing. However, ICs produced at 70 nm design rules with manufacturable k 1 values will require that 157 nm wavelength lithography tools incorporate the same RETs utilized in 248nm, and 193 nm tools. These enhancements will include Alternating Phase Shifting Masks (AltPSM) and Optical Proximity Correction (OPC) on F 2 doped quartz reticle substrates. This study investigates simulation results when AltPSM is applied to sub-100 nm test patterns in 157 nm lithography in order to maintain Critical Dimension (CD) control for both nested and isolated geometries. Aerial image simulations are performed for a range of numerical apertures, chrome regulators, gate pitches and gate widths. The relative performance for phase shifted versus binary structures is also compared. Results are demonstrated in terms of aerial image contrast and process window changes. The results clearly show that a combination of high NA and RET is necessary to achieve usable process windows for 70 nm line/space structures. In addition, it is important to consider two-dimensional proximity effects for sub-100 nm gate structures.

Extending 157-nm lithography to the 70 nm node will be a difficult challenge due to the stringent requirements on image placement accuracy. At the University of Wisconsin Computational Mechanics Center, numerical and experimental studies are being conducted to investigate materials, fabrication processing, and system parameters necessary to achieve the required overlay error budget. This paper provides our latest results for 157-nm reticles, including the photomask / pellicle system. Mask blank fabrication and pattern transfer effects were simulated utilizing three-dimensional finite element (FE) structural models. The pattern-specific in-plane distortions (IPD) induced by each fabrication process step have been determined using the IBM Nighteagle / Falcon layout. To complete the static structural analysis, the effects of bonding a pellicle were also identified. The thermomechanical response of reticles during e-beam patterning and exposure were evaluated utilizing FE heat transfer models. Results from e-beam writing simulations indicate that transient thermal distortions from patterning the Nighteagle / Falcon design are not critical. However, under high throughput conditions, the IPD induced during scanning exposure can become relatively large. The simulation results provide an indication of the total overlay error budget to be expected, and demonstrate the importance of using predictive models to optimize mask system performance in a cost-effective manner.

Extreme ultraviolet lithography (EUVL) is the leading candidate for next generation lithography with the potential for extendibility beyond the 50-nm node. The three-layer absorber stack for EUVL reticles consists of an absorber, repair buffer and etch-stop layers, while a two-layer absorber stack eliminates the etch-stop layer. A portion of the mask pattern distortion can be assigned to the absorber stack's film stress. Ideally, the absorber stack films would have zero stress uniformly across the mask, which would produce zero pattern distortion when the films were removed during the pattern transfer processes. Maintaining adequate thin film stress control and uniformity relies on accurate thin film thickness measurements. The thin film deposition parameters can have a significant influence on the metrology technique's ability to measure the thin film's thickness. We have studied resistive and photonic metrology techniques for absorber stack thin film thickness measurement and stress control.

Optical lithography makes various problems in the low k₁ range due to high MEF and low process margin. This has an impact upon CD variation, pattern collapse, pattern thinning, and undesirable repeating defect throughout the wafer process. Moreover, it is difficult to understand main factor that affected process problems. In this paper, mainly we study impacts on wafer process using 120nm design rule mask. Experimentally, w use full field mask composed of DRAM structure with cell array and periphery patterns. 0.70 NA KrF exposure tool and APSM are used to get high process margin and good pattern fidelity. As a result, we got about 10 percent EL and 0.5 micrometers DOF or more in actual process. Also CD variation was controlled within 15nm using CMP and BARC. However, mask CD variation was amplified on wafer, especially wafer CD variation was very serious in the edge of cell array by optical proximity effect, stand wave effect, and mask. Patterning and etching process occurred line thinning, and it was inspected as repeating defect. TO get optimum process result, it was very important to control mask CD and wafer CD within process window after mask CD correlation. We could find that mask or wafer process have an influence on unexpected problem for 120nm process with low k₁ value.

The mask error enhancement factor for contact holes is experimentally determined for 180 nm features under a variety of exposure conditions. Since its magnitude depends, in part, upon the slope of the aerial image, the value is calculated as a function of binary and phase shift masks, mask bias, and conventional and quadrupole illumination. The primary purpose is to compare experimental results to a simulation study and determine which simulation trends are accurately predicted. The results show that isolated contacts have lower MEEF than dense contacts but that dense contacts do not necessarily have the largest error factor. The magnitude of MEEF and the optimal bias that minimizes it are show to be accurately predicted.

Mask error effects of attenuated PSM wafer CD and process windows were analyzed by simulation, and proven experimentally for dense line applications. Among possible mask errors, mask CD variations dominate wafer CD control like a conventional binary mask, but phase and transmission errors are also significant especially when a defocus condition is applied. There is an apparent trend of MEEF versus mask bias. It is increased as mask bias goes towards the positive direction, i.e., overexposure condition, where process window can be maximized. Therefore mask bias should be chosen carefully on the basis of small MEEF as well as large process window.

Optical proximity effect is a well-known phenomenon in photolithography. Such an effect results from the structural interaction between the main feature and the neighboring features. Recent observations have shown that such structural interactions not only affect the critical dimension of the main feature at the image plane, but also the exposure latitude of the main feature. In this paper, it has been shown that the variation of the critical dimension as well as the exposure latitude of the main feature is a direct consequence of light field interference between the main feature and the neighboring features. Depending on the phase of the field produced by the neighboring features, the main feature critical dimension and exposure latitude can be improved by constructive light field interference, or degraded by destructive light field interference. The phase of the field produced by the neighboring features can be shown to be in the location where the field produced by the neighboring features can be shown to be dependent on the pitch as well as the illumination angle. For a given illumination, the forbidden pitch lies in the location where the field produced by the neighboring features interferes with the field of the main feature destructively. The theoretical analysis given here offers the tool to map out the forbidden pitch locations for any feature size and illumination conditions. More importantly, it provides the theoretical ground for illumination design in order to suppress the forbidden pitch phenomenon, and for scattering bar placement to achieve optimal performance as well.

Mask error enhancement factor (MEEF) depends on the two groups of factors. The first group is process-related, and includes parameters such as illumination settings and exposure dose. The second group is mask-related and includes feature sizes, feature shapes, and proximity interactions between features. Factors from the second group have not been studied to the same depth as factors of the first group. Only simple shapes like dense lines, isolated lines, and contact holes, each with only one degree of the distortion freedom, have been addressed by the traditional MEEF theory. We present here a comprehensive MEEF theory for arbitrary 2D mask shapes, with multiple degrees of the distortion freedom. This theory provides a rigorous formal framework for studying impact of the complex mask errors. We introduce mask error enhancement matrix (MEEM) to capture self- and cross-enhancement effects when neighboring mask distortions collectively contribute into the wafer errors. The norm of this matrix is called a generalized MEEF, an important characteristic of the pattern transfer process. The Singular Value Decomposition of MEEM naturally groups edges of the mask shapes into the proximity-related sets, each with a distinct G-MEEF value. Ranking mask areas by this value helps to identify difficult-to-print regions and to design MEEF-sensitive test patterns. An application of matrix MEEF theory is shown to be iterative feedback techniques for model-based OPC.

In this study, process latitude, mask error enhancement factor and iso-dense bias have been experimentally measured as a function of the KrF excimer laser bandwidth. The experiment results are in agreement with photoresist simulations over a range of imaged nominal feature sizes from 120nm to 300nm at 0.6/0.75 NA/(sigma) . The mask error enhancement factor (MEEF) is shown to vary by approximately 2.3 percent for 160nm and 3.3 percent for 150nm isolated lines per 0.1pm of excimer-laser bandwidth, characterized by the full width at half maximum (FWHM). The 180nm line iso-dense bias exhibits a shift of approximately 2nm per 0.1pm FWHM. Under the given process conditions, linear empirical relationships are derived for the dependency of MEEF and iso-dense offset on FWHM excimer-laser spectral width for a range of imaged CDs. Such considerations can be used to augment the existing predictive CD-control estimation and model-based optical proximity correction.

Resolution enhancement techniques, such as phase shifting, OPC and assist features were greatly used to enable sub-wavelength features printing using 248nm lithography due to the delay of 193nm lithography. Assist features, also known as scattering bars, was utilized to improve the image quality for isolate lines for the sub-wavelength features as well as to improve the overlapping process latitude. In this study, MEEF was fully characterized with assist features. Great improvement in MEEF was observed by applying assist features to the sub-0.13 micrometers technologies. The effect of mask error enhancement by the deviation from the designed line width of the image line with different sets of placement and width sizes of the assist features was been studied. The impact of MEEF by different placement of the assist features was observed. In addition, a simulation program had been used for the study of the deviation in the placement of the scattering bars as well as its size. It was shown that simulation aerial image results were quite matching with imperial results. The effect of annular illumination had also been examined as compared to conventional illuminations.

Many studies have reported that the alternating phase shift mask (Alt. PSM) improves resolution and depth of focus (DOF). The purpose of this study is to investigate the influence of process latitude and optimize undercut and pre etch depth of both single trench and dual trench process employing the Solid-CMTM simulation tool for 248 nm DUV lithography system. To compensate for the imbalance intensity, we adopted the amount of undercut in the phase shifter regions of both single trench and dual trench. The results suggest that process is improved with optimized undercut for 130 nm line & space (L/S). For the single trench, we can see that with undercut of about 800 Angstrom the max intensities are equal. In the case of dual trench, the margins for image balance of 800 Angstrom and 1600 Angstrom undercuts was obtained up to 800 Angstrom, 1200 Angstrom of pre etch depth, respectively. Finally, it was found that the effect of undercut was improving the process latitude and the balance intensity of both single trench and dual trench.

It is reported that Alternating Phase Shifting Mask (Alt. PSM) enhances the resolution and depth of focus and reduces the mask error enhancement factor efficiently. In spite of above-mentioned advantages, Alt. PSM is rarely used for some problems. One of the problems is the image imbalance between the transmittance of the shift and the nonshift area on Alt. PSM. To minimize the image imbalance, various manufacturing processes are introduced for both single and dual trench structures. In this paper, the image balance was simulated with AIMS and the Solid-CM program. The pattern profile, CD, depth and a phase uniformity of Alt. PSM were investigated experimentally. We carried out 3 types of processes (a) single trench (wet etch process), (b) single trench (dry etch process with undercuts), (c) dual trench (dry etch process with undercuts). The type (a) showed 12 nm of CD uniformity, 1.56 degrees of phase shift uniformity and 63 Angstrom of the shift depth. And its transmittance of the shift region was 99.85 percent. For the type (b), its CD uniformity, phase shift uniformity, depth uniformity and the transmittance of the shift region were 15 nm, 11.56 degrees, 208 Angstrom and 99.76 percent, respectively. And the experiments of the type (c) are now under way.

In this paper we suggest a promising strategy for optical lithography extension. In general the process margin of a contact hole is poorer than line and space patterning for the same feature size. An asymmetrical contact hole mask designed by simulations was fabricated and printed. Several techniques in designing this photomask have been considered. We have some difficulties in patterning device with design rule of below sub-half micrometer. And we have to overcome not only wafer pattern fidelity but also mask manufacturing process such as OPC pattern generation and defect inspection and repair. Attenuated triple-tone phase shifting masks with higher transmission and patterned opaque regions give better imaging performances with improved process margins. Therefore we suggest that a triple-tone mask is a possible solution for the optical lithography extension technology.

A study of both the printability and inspectability of phase defects in alternating phase-shifting masks is made using rigorous FDTD simulation of mask topography and vector-based models for optical imaging that account for the angular dependence of the mask scattering coefficients and high numerical aperture effects. Aerial images inside the photoresist are calculated through focus under typical 193nm stepper imaging conditions in order to assess the effects of size, phase, location and shape on the printability of phase bump defects. Defects located adjacent to the vertical sidewalls of the phase shifter are found to affect CD more than defects located in the center of the phase shifter. Defect shape does not appear to be a strong factor in printability. Aerial images and difference signals for various defects under mask transmission-imaging inspection conditions are calculated. A study of illumination pupil effects in mask inspection is presented. Defect visibility when varying defect size and position is investigated. Defects close to the phase shifter vertical sidewall are less visible. Defects are observed to be more visible when the mask is defocused. An investigation of illumination effects show that coherent systems can see defects better than incoherent systems, while certain incident plane waves are found to 'see' a particular defect better than others.

The edge domain decomposition method (edge-DDM) is developed as a very powerful extension of the domain decomposition methods presented for the rapid and accurate simulation of light scattering from advanced photomasks. The range of validity of the method is systematically evaluated and it is found to be accurate for wavelength-sized mask features with large vertical topography. The error associated primarily with neglecting corner effects is seen to concentrate at the extremities of the spectrum of propagating plane waves and is therefore filtered-out by the NA and the larger than one reduction factors in typical projection printing systems. A possible algorithmic implementation of the method, that involves rigorous pre-calculation of the edge-diffraction of all types of edges present in the layout, is presented for the simulation of large and arbitrary 2D layouts of alt. PSMs. A speed-up factor of 172,800 (1sec vs. 2days) is shown in the simulation of simple 3um by 3um (4X) 2D layouts (isolated hole and isolated island) with accuracy better than 99 percent compared to the rigorous 3D simulation of the mask diffraction. An example of the edge-DDM applied on a large 12um by 16um 2D layout of a 0deg/90deg/270deg alt. PSM, where the near fields are estimated in less than 1min, is also presented. Spectral matching of the edge-diffraction with more compact piecewise constant models is shown to lead to additional speed-ups of the edge-DDM.