PROCEEDINGS VOLUME 5117
MICROTECHNOLOGIES FOR THE NEW MILLENNIUM 2003 | 19-21 MAY 2003
VLSI Circuits and Systems
IN THIS VOLUME

0 Sessions, 63 Papers, 0 Presentations
Technology I  (4)
CAD I  (4)
Modeling  (4)
CAD II  (3)
MICROTECHNOLOGIES FOR THE NEW MILLENNIUM 2003
19-21 May 2003
Maspalomas, Gran Canaria, Canary Islands, Spain
Image Processing I
Proc. SPIE 5117, VLSI architecture for MPEG-4 core profile video codec with accelerated bitstream processing, 0000 (21 April 2003); doi: 10.1117/12.498499
Proc. SPIE 5117, FPGA implementation of Santos-Victor optical flow algorithm for real-time image processing: an useful attempt, 0000 (21 April 2003); doi: 10.1117/12.498750
Proc. SPIE 5117, Integer cosine transform chip design for image compression, 0000 (21 April 2003); doi: 10.1117/12.498771
Proc. SPIE 5117, Mapping of real-time and low-cost super-resolution algorithms onto a hybrid video encoder, 0000 (21 April 2003); doi: 10.1117/12.498868
Mixed Circuits I
Proc. SPIE 5117, State of the art in CMOS threshold logic VLSI gateimplementations and applications, 0000 (21 April 2003); doi: 10.1117/12.497792
Proc. SPIE 5117, New efficient offset voltage cancellation techniques using digital trimming, 0000 (21 April 2003); doi: 10.1117/12.498597
Proc. SPIE 5117, Novel 1.25-Gb/s CMOS burst mode optical receiver with automatic gain controllable preamplifier and a highly sensitive peak detector without external reset signal, 0000 (21 April 2003); doi: 10.1117/12.498866
Data Communications I
Proc. SPIE 5117, Scheduling components for multigigabit network SoCs, 0000 (21 April 2003); doi: 10.1117/12.498488
Proc. SPIE 5117, CMOS mixed-signal MODEM for data transmission and control of electrical household appliances using a low-voltage power line, 0000 (21 April 2003); doi: 10.1117/12.498507
Proc. SPIE 5117, High-speed clock recovery unit based on a phase aligner, 0000 (21 April 2003); doi: 10.1117/12.498653
Proc. SPIE 5117, Practical high-level methodology case study: implementation of an ATM over SDH transceiver from the system specification, 0000 (21 April 2003); doi: 10.1117/12.498776
Technology I
Proc. SPIE 5117, High-bandwidth low-latency global interconnect, 0000 (21 April 2003); doi: 10.1117/12.499957
Proc. SPIE 5117, Leakage control for deep-submicron circuits, 0000 (21 April 2003); doi: 10.1117/12.498181
Proc. SPIE 5117, Scaling down photonic waveguide devices on the SOI platform, 0000 (21 April 2003); doi: 10.1117/12.498795
Proc. SPIE 5117, Theoretical analysis on characteristics and efficiency of CdS/CdTe heterojunction solar cell, 0000 (21 April 2003); doi: 10.1117/12.498527
VLSI Architectures I
Proc. SPIE 5117, Signaling in the heterogeneous architecture multiprocessor paradigm, 0000 (21 April 2003); doi: 10.1117/12.499610
Proc. SPIE 5117, High-performance VLSI architecture for video processing, 0000 (21 April 2003); doi: 10.1117/12.498585
CAD I
Proc. SPIE 5117, System-level verification methodology for advanced switch fabrics, 0000 (21 April 2003); doi: 10.1117/12.498612
Proc. SPIE 5117, Models and algorithm for the calculation of the impulse response on IR-wireless indoor channels, 0000 (21 April 2003); doi: 10.1117/12.498616
Proc. SPIE 5117, VESTA: a system-level verification environment based on C++, 0000 (21 April 2003); doi: 10.1117/12.498618
Proc. SPIE 5117, MHDL CAD tool with fault circuit handling, 0000 (21 April 2003); doi: 10.1117/12.498804
Data Communications II
Proc. SPIE 5117, Switch-based interconnect architecture for future systems on chip, 0000 (21 April 2003); doi: 10.1117/12.498809
Proc. SPIE 5117, CMOS receiver circuits for high-speed data transmission according to LVDS standard, 0000 (21 April 2003); doi: 10.1117/12.498989
Proc. SPIE 5117, System-level optimization of baseband filters for communication applications, 0000 (21 April 2003); doi: 10.1117/12.499358
Mixed Circuits II
Proc. SPIE 5117, Analog filter circuits testing using voltage and current measurements, 0000 (21 April 2003); doi: 10.1117/12.498909
Proc. SPIE 5117, Iterative current mode per pixel ADC for 3D SoftChip implementation in CMOS, 0000 (21 April 2003); doi: 10.1117/12.498983
Proc. SPIE 5117, Novel low-voltage low-power Gb/s transimpedance amplifier architecture, 0000 (21 April 2003); doi: 10.1117/12.499081
Proc. SPIE 5117, Sigma-delta modulator for a programmable gain low-power high-linearity automotive sensor interface, 0000 (21 April 2003); doi: 10.1117/12.499651
Proc. SPIE 5117, LP-LV high-performance monolithic DTMF receiver with on-chip test facilities, 0000 (21 April 2003); doi: 10.1117/12.501225
VLSI Architectures II
Proc. SPIE 5117, Flexible coprocessor architectures for ambient intelligent applications in the mobile communication and automotive domain, 0000 (21 April 2003); doi: 10.1117/12.498915
Proc. SPIE 5117, Lifting folded pipelined discrete wavelet packet transform architecture, 0000 (21 April 2003); doi: 10.1117/12.498992
Poster Session
Proc. SPIE 5117, Turbo decoder core design for system development, 0000 (21 April 2003); doi: 10.1117/12.500346
VLSI Architectures II
Proc. SPIE 5117, Some experiences using system-on-chip buses, 0000 (21 April 2003); doi: 10.1117/12.501356
Image Processing II
Proc. SPIE 5117, Performance optimization of an MPEG-2 to MPEG-4 video transcoder, 0000 (21 April 2003); doi: 10.1117/12.498998
Proc. SPIE 5117, New lifting folded pipelined discrete wavelet transform architecture, 0000 (21 April 2003); doi: 10.1117/12.499049
Proc. SPIE 5117, 0.25-µm technology arithmetic codec for mobile multimedia communicators, 0000 (21 April 2003); doi: 10.1117/12.499051
Proc. SPIE 5117, New distributed arithmetic discrete wavelet packet transform architecture, 0000 (21 April 2003); doi: 10.1117/12.499056
Proc. SPIE 5117, Mixed-signal early vision chip with embedded-image and programming memories and digital I/O, 0000 (21 April 2003); doi: 10.1117/12.499153
Technology II
Proc. SPIE 5117, Approaching nanoscale integration, 0000 (21 April 2003); doi: 10.1117/12.501347
Proc. SPIE 5117, Holographic study of microsystems during space missions in the 21st century, 0000 (21 April 2003); doi: 10.1117/12.499434
Proc. SPIE 5117, Evaluation of package and technology effects on substrate-crosstalk isolation in CMOS RFIC, 0000 (21 April 2003); doi: 10.1117/12.499031
Proc. SPIE 5117, Low-cost VLSI-compatible resonant-cavity-enhanced p-i-n in micron-Si operating at the VCSEL wavelengths around 850 nm, 0000 (21 April 2003); doi: 10.1117/12.499146
Modeling
Proc. SPIE 5117, Macromodel for exact computation of propagation delay time in GaAs and CMOS technologies, 0000 (21 April 2003); doi: 10.1117/12.498586
Proc. SPIE 5117, Simulation of void formation in interconnect lines, 0000 (21 April 2003); doi: 10.1117/12.498783
Proc. SPIE 5117, Timing and power model for CMOS inverters, 0000 (21 April 2003); doi: 10.1117/12.499004
Proc. SPIE 5117, Empirical model of the metal losses in integrated inductors, 0000 (21 April 2003); doi: 10.1117/12.501210
CAD II
Proc. SPIE 5117, On-chip training for cellular neural networks using iterative annealing, 0000 (21 April 2003); doi: 10.1117/12.498954
Proc. SPIE 5117, Optimal design of a leak-proof SRAM cell using MCDM method, 0000 (21 April 2003); doi: 10.1117/12.499068
Proc. SPIE 5117, Evolutionary design and FPGA implementation of digital filters, 0000 (21 April 2003); doi: 10.1117/12.499103
Poster Session
Proc. SPIE 5117, Hierarchical test pattern composition to testing a foveal imager ASIC, 0000 (21 April 2003); doi: 10.1117/12.501392
Proc. SPIE 5117, Experimental characterization of a synchronous frequency-hopping spread-spectrum transceiver for wireless optical communications, 0000 (21 April 2003); doi: 10.1117/12.498729
Proc. SPIE 5117, Analysis of current-mode flip-flops in CMOS technologies, 0000 (21 April 2003); doi: 10.1117/12.498978
Proc. SPIE 5117, Temperature in HFETs when operating in DC, 0000 (21 April 2003); doi: 10.1117/12.501195
Proc. SPIE 5117, Laser-induced structure defects and their use for modification of the properties of (Cd,Hg)Te epitaxial layers and CdTe crystals, 0000 (21 April 2003); doi: 10.1117/12.498538
Proc. SPIE 5117, Design and simulation of an a-Si:H/GaAs HBT with improved DC and high-frequency characteristics, 0000 (21 April 2003); doi: 10.1117/12.499064
Proc. SPIE 5117, Diffusion barrier layer fabrication by plasma immersion ion implantation, 0000 (21 April 2003); doi: 10.1117/12.501329