Keynote Session I
Proc. SPIE 5837, Substrate noise coupling: a pain for mixed-signal systems, 0000 (30 June 2005); doi: 10.1117/12.608442
Mixed-Signal Design Methods
Proc. SPIE 5837, New CAD issues and considerations for the design of mixed-signal SOCs, 0000 (30 June 2005); doi: 10.1117/12.607895
Proc. SPIE 5837, A reuse-based framework for the design of analog and mixed-signal ICs, 0000 (30 June 2005); doi: 10.1117/12.607930
High-Performance Interconnect
Proc. SPIE 5837, Area-, power-, and pin-efficient bus structures using multi-bit-differential signaling, 0000 (30 June 2005); doi: 10.1117/12.608544
Sigma-Delta Data Converters
Proc. SPIE 5837, A continuous time low-pass sigma delta modulator implemented with transmission lines, 0000 (30 June 2005); doi: 10.1117/12.607359
Proc. SPIE 5837, A dual-mode complex delta-sigma ADC in CMOS for wireless-LAN receivers, 0000 (30 June 2005); doi: 10.1117/12.608193
Proc. SPIE 5837, Continuous-time cascaded sigma-delta modulators for VDSL: a comparative study, 0000 (30 June 2005); doi: 10.1117/12.607923
Proc. SPIE 5837, A 0.35-µm CMOS 17-bit@40-kS/s cascade 2-1 sigma-delta modulator with programmable gain and programmable chopper stabilization, 0000 (30 June 2005); doi: 10.1117/12.608304
Proc. SPIE 5837, Jitter effect comparison on continuous-time sigma-delta modulators with different feedback signal shapes, 0000 (30 June 2005); doi: 10.1117/12.607387
Proc. SPIE 5837, Optimization algorithm for linearity enhancement in the design of continuous-time sigma-delta modulators, 0000 (30 June 2005); doi: 10.1117/12.608388
High-Performance Circuits and Architectures
Proc. SPIE 5837, Bounded budgeted parallel architecture versus control dominated architecture for hazard data-signal processor synthesis, 0000 (30 June 2005); doi: 10.1117/12.608318
Digital Design Methodologies and Tools I
Proc. SPIE 5837, Data-driven array architectures: a rebirth?, 0000 (30 June 2005); doi: 10.1117/12.608799
High-Performance Circuits and Architectures
Proc. SPIE 5837, A novel gigabit multidrop serial link for high-speed digital systems, 0000 (30 June 2005); doi: 10.1117/12.608259
Proc. SPIE 5837, Linearisation for analogue optical links using integrated CMOS predistortion circuits, 0000 (30 June 2005); doi: 10.1117/12.608759
Proc. SPIE 5837, A 40-Gb/s driver circuit using a novel inductive bandwidth extension technique, 0000 (30 June 2005); doi: 10.1117/12.608543
Analog Circuits
Proc. SPIE 5837, A GmC filter design methodology for high-speed continuous-time sigma-delta A/D converters in a deep sub-micron technology, 0000 (30 June 2005); doi: 10.1117/12.608481
Proc. SPIE 5837, A 0.18-µm CMOS low-noise highly linear continuous-time seventh-order elliptic low-pass filter, 0000 (30 June 2005); doi: 10.1117/12.608294
Proc. SPIE 5837, CMOS current amplifiers exhibiting independent AC and DC current amplification, 0000 (30 June 2005); doi: 10.1117/12.608523
Proc. SPIE 5837, An efficient 2-stage fractional charge pump based on frequency regulation, 0000 (30 June 2005); doi: 10.1117/12.608274
Multimedia I
Proc. SPIE 5837, A quarter pixel precision motion estimation architecture for H.264/AVC video coding, 0000 (30 June 2005); doi: 10.1117/12.608240
Proc. SPIE 5837, Statistically optimized VLSI architecture for buffer for EBCOT in JPEG2000 encoder, 0000 (30 June 2005); doi: 10.1117/12.608585
Proc. SPIE 5837, Hardware implementation of the wavelet transform for JPEG2000, 0000 (30 June 2005); doi: 10.1117/12.608221
Proc. SPIE 5837, Haar wavelet processor for adaptive on-line image compression, 0000 (30 June 2005); doi: 10.1117/12.608261
Analog, Mixed-Signal, and Power Circuit Design Methodologies and Tools
Proc. SPIE 5837, Impact of package parasitics on crosstalk in mixed-signal ICs, 0000 (30 June 2005); doi: 10.1117/12.608638
Proc. SPIE 5837, Net order optimization in analog net bundles, 0000 (30 June 2005); doi: 10.1117/12.608624
Analog and Mixed-Signal Design Methodologies and Tools
Proc. SPIE 5837, On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis, 0000 (30 June 2005); doi: 10.1117/12.607932
Analog, Mixed-Signal, and Power Circuit Design Methodologies and Tools
Proc. SPIE 5837, A mismatch characterization and simulation environment for weak-to-strong inversion CMOS transistors, 0000 (30 June 2005); doi: 10.1117/12.607710
Proc. SPIE 5837, Modeling of power control schemes in induction cooking devices, 0000 (30 June 2005); doi: 10.1117/12.608066
Circuit Design for RF Applications
Proc. SPIE 5837, Behavioral study and design of a digital interpolator filter for wireless reconfigurable transmitters, 0000 (30 June 2005); doi: 10.1117/12.608352
Proc. SPIE 5837, Modeling and design of high-order phase locked loops, 0000 (30 June 2005); doi: 10.1117/12.608485
Proc. SPIE 5837, Voltage-buffer-based low-power area-efficient SC FIR filter for wireless communication, 0000 (30 June 2005); doi: 10.1117/12.608241
Proc. SPIE 5837, Band-pass transimpedance read-out circuit for UHF MEMS resonator applications, 0000 (30 June 2005); doi: 10.1117/12.608331
Digital Circuits
Proc. SPIE 5837, An integrated controller for a flexible and wireless atomic force microscopy, 0000 (30 June 2005); doi: 10.1117/12.607535
Proc. SPIE 5837, A CMOS latched driver using bootstrap technique for low-voltage applications, 0000 (30 June 2005); doi: 10.1117/12.608300
Proc. SPIE 5837, Performance analysis of full adders in CMOS technologies, 0000 (30 June 2005); doi: 10.1117/12.608269
Proc. SPIE 5837, Temperature effects on circuit synchronism, 0000 (30 June 2005); doi: 10.1117/12.608798
Keynote Session II
Proc. SPIE 5837, Review of energy harvesting techniques and applications for microelectronics, 0000 (30 June 2005); doi: 10.1117/12.613046
Technology Reliability
Proc. SPIE 5837, Ring oscillator behavior after oxide breakdown, 0000 (30 June 2005); doi: 10.1117/12.608245
Proc. SPIE 5837, Transient electro-thermal investigations of interconnect structures exposed to mechanical stress, 0000 (30 June 2005); doi: 10.1117/12.608414
Baseband Design for Wireless Transceivers
Proc. SPIE 5837, A 2.5-V 4-mA GSM base-band transmit port with 2.8-mm2 area in CMOS 0.18 µm, 0000 (30 June 2005); doi: 10.1117/12.607227
Proc. SPIE 5837, A programmable baseband chain for a WCDMA/WLAN (802.11b) multi-standard zero-IF receiver, 0000 (30 June 2005); doi: 10.1117/12.608661
Keynote Session III
Proc. SPIE 5837, Low-power short-range transceivers for sensor network applications, 0000 (30 June 2005); doi: 10.1117/12.608235
Wireless Transceivers
Proc. SPIE 5837, CMOS implementation of ultra-wideband systems, 0000 (30 June 2005); doi: 10.1117/12.608093
Proc. SPIE 5837, A 2-V 0.35-µm CMOS DECT RF front end with on-chip frequency synthesizer, 0000 (30 June 2005); doi: 10.1117/12.608109
Proc. SPIE 5837, High bit rate BPSK receiver, 0000 (30 June 2005); doi: 10.1117/12.608385
Digital Design Methodologies and Tools I
Proc. SPIE 5837, Power analysis methodology and library in SystemC, 0000 (30 June 2005); doi: 10.1117/12.608432
Proc. SPIE 5837, Energy estimation and optimization in architectural descriptions of complex embedded systems, 0000 (30 June 2005); doi: 10.1117/12.608256
Proc. SPIE 5837, Algorithms to get the maximum operation frequency for skew-tolerant clocking schemes, 0000 (30 June 2005); doi: 10.1117/12.608064
Analog Test
Proc. SPIE 5837, Embedded design-for-testability strategies to test high-resolution SD modulators, 0000 (30 June 2005); doi: 10.1117/12.608301
Proc. SPIE 5837, Digital test of a sigma-delta modulator in a mixed-signal BIST architecture, 0000 (30 June 2005); doi: 10.1117/12.607615
Proc. SPIE 5837, Experimental comparison of different oscillation-based test techniques in an analog block, 0000 (30 June 2005); doi: 10.1117/12.608801
Proc. SPIE 5837, Voltage to frequency converter for DAC test, 0000 (30 June 2005); doi: 10.1117/12.608479
Modeling and Design of Passive RF Components
Proc. SPIE 5837, Design and modeling of an on-silicon spiral inductor library using improved EM simulations, 0000 (30 June 2005); doi: 10.1117/12.608292
Proc. SPIE 5837, Modeling of passive components in VLSI technologies, 0000 (30 June 2005); doi: 10.1117/12.608743
Proc. SPIE 5837, Design considerations for high pass frequency passive filters, 0000 (30 June 2005); doi: 10.1117/12.608359
Proc. SPIE 5837, Design considerations and tradeoffs for passive RFID tags, 0000 (30 June 2005); doi: 10.1117/12.608715