This PDF file contains the front matter associated with SPIE Proceedings Volume 9658, including the Title Page, Copyright information, Table of Contents, Invited Panel Discussion, and Conference Committee listing.

Continuous innovation of mobile devices such as smart phones provides new and better experiences for users. Such innovations demand for FPD (Flat Panel Display) to have higher resolution, a smarter design, a lighter weight, lower energy consumption, and many other improvements. Among those requirements, higher resolution is the most critical feature to achieve realistic images on the screen and to provide different user experiences. However, higher resolution LCD (Liquid Crystal Display) panels cannot be easily achieved simply by scaling and shrinking the process rule as has been historically done in the semiconductor industry. This is because an LCD panel is an optical device as well as being an electrically controlled integrated circuit. The important factors in fabricating an LCD panel as an optical device are discussed here in conjunction with the photo mask requirements.

Recently, the annual increase in the definition of high-function panels for mobile devices such as smartphones or tablets has led to TFT-LCD and TFT-OLED (Organic Light Emitting Diode) circuits becoming increasingly miniaturized and densified. TFT circuits are comprised of a superposition of layers such as gates, acts and contact holes, with a certain amount of allowance between each layer. However, that allowance has now disappeared due to the high density of the circuit. Therefore, a high-precision mask overlay is essential in order to realize circuits with even higher density. In the mask manufacturing process, the mask is placed on a writer tool, during which the back side surface of the mask makes contact with the stage. This contact alters the front side flatness of the mask. Moreover, once the circuit pattern has been drawn on the mask, it is removed from the writer tool, thus altering the front side flatness and coordinates of the mask. In this paper, we evaluated the overlay of a panel that underwent exposure using a number of masks with different back side flatness. As a result, we confirmed that deviations in the back side flatness of each mask manifest themselves in the panel overlay. Therefore, we need to improve the flatness of the back side of masks hereafter in order to further enhance the panel overlay.

In recent years, major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCP). Insertion of DSA for IC fabrication is seriously considered for the 7 nm node. At this node the DSA technology could alleviate costs for multiple patterning and limit the number of masks that would be required per layer. At imec, multiple approaches for inserting DSA into the 7 nm node are considered. One of the most straightforward approaches for implementation would be for via patterning through templated DSA; a grapho-epitaxy flow using cylindrical phase BCP material resulting in contact hole multiplication within a litho-defined pre-pattern. To be implemented for 7 nm node via patterning, not only the appropriate process flow needs to be available, but also DSA-aware mask decomposition is required. In this paper, several aspects of the imec approach for implementing templated DSA will be discussed, including experimental demonstration of density effect mitigation, DSA hole pattern transfer and double DSA patterning, creation of a compact DSA model. Using an actual 7 nm node logic layout, we derive DSA-friendly design rules in a logical way from a lithographer’s view point. A concrete assessment is provided on how DSA-friendly design could potentially reduce the number of Via masks for a place-and-routed N7 logic pattern.

Reticles for manufacturing upcoming 10nm and 7nm Logic devices will become very complex, no matter whether 193nm water immersion lithography will continue as main stream production path or EUV lithography will be able to take over volume production of critical layers for the 7nm node. The economic manufacturing of future masks for 193i, EUV and imprint lithography with further increasing complexity drives the need for multi-beam mask writing as this technology can overcome the influence of complexity on write time of today’s common variable shape beam writers. Local registration of the multi-beam array is a critical component which greatly differs from variable shape beam systems. In this paper we would like to present the local registration performance of the IMS Multi-Beam Mask Writer system and the metrology tools that enable the characterization optimization.

As the pattern size became gradually smaller, the defect detectability of the photomask inspection tool was more improved. For these reasons, we have to repair various defects more precisely. By improving the mask yield through the repair process, we can reduce the cost of mask fabrication. In this study, we studied the defect called quartz damage which distorts the AIMSTM (Arial Image Measurement System) intensity of the repaired pattern and causes the scrap of the photomask. The quartz damage is generally observed when the abnormal defects like particles were repaired in the poor repairing condition. The quartz damage occasionally results in repair errors and affects the AIMS intensity. Currently there is no clear solution for recovering the quartz damage. As a result, it is very difficult to get the high quality photomask if the quartz damage is generated on the photomask. Therefore, it is important to find a method of recovering the quartz damage for producing the high quality photomask. In this paper, we demonstrated that the quartz damage can be recovered through the TEOS (Tetraethoxysilane) gas deposition. Also we investigated the effect on the recovery of the quartz damage of various parameters such as the type and the depth of the quartz damage as well as the repair conditions of the TEOS gas deposition.

E-beam based technologies are widely used for metrology applications in both wafer fabs and mask shops due to their intrinsic high resolution capabilities. However, the throughput requirements for defect inspection are orders of magnitude higher than what is traditionally achievable with electron beam technologies. We have developed a novel multi-electron beam based technology to address the existing need for high speed imaging of nanoscale patterns. This technique enables ultra-high image acquisition rates which scale with the number of electron beams. In this article the technology development status and imaging results will be shown, including first results with the multi-beam SEM on EUV masks.

A new PSM using high transmittance is developed to overcome patterning process limits in ArF immersion lithography. We optimized mask structure, materials, and film thicknesses for patterning process. A new material for phase-shifter is applied to the HT-PSM to exhibit higher transmittance in ArF wavelengths and the thickness of the new material is thinner than that of the conventional 6% phase-shifter (MoSiON). A new blank structure using a MoSi shading layer with double Cr hardmasks (HM) is developed and suggested for the HTPSM process. Double HM blank stacks enable the HT-PSM to adopt thin PR process for resolution enhancement in mask process. The first Cr on the MoSi is utilized as a HM to etch MoSi shading layer, an adhesion layer for PR process, and also a capping layer to protect blind area during MoSi and phase-shifter etching. In contrast, the role of the second Cr between MoSi and phase-shifter is an etch stopper for MoSi and a HM to etch phase-shifter at the same time. However, Double HM process has some problems, such as first Cr removal during second Cr etching and complex process steps. To solve the Cr removal issues, we evaluated various Cr layers which have different etchrates and compositions. According to the evaluations, we optimized thicknesses and compositions of the two Cr layers and corresponding etching conditions. Lithography simulations demonstrate that the new HT-PSM has advantages in NILS in aerial images. As a result, initial wafer exposure experiments using the HT-PSM show 13-32% improvements in LCDU compared to that of the conventional 6% PSM due to its higher NILS.

The pattern splitting algorithm for 1D Gridded-Design-Rules layout (1D layout) for sub-10 nm node logic devices is shown. It is performed with integer linear programming (ILP) based on the conflict graph created from a grid map for each designated pitch. The relation between the number of times for patterning and the minimum pitch is shown systematically with a sample pattern of contact layer for each node. From the result, the number of times for patterning for 1D layout is fewer than that for conventional 2D layout. Moreover, an experimental result including SMO and total integrated process with hole repair technique is presented with the sample pattern of contact layer whose pattern density is relatively high among critical layers (fin, gate, local interconnect, contact, and metal).

Inverse lithography technology (ILT) has become one of the key technologies in recent years for highly optimized mask synthesis of physical layout of large scale semiconductor designs. Localized printability enhancement (LPE) has also proved useful in applying computational lithography to repair so-called hotspots to efficiently refine the designs for better process windows without re-optimizing the entire design. Although such a localized design refinement on a relatively small number of hotspots is already quite useful, in reality, it is possible that there are a large number of hotspots, thereby necessitating handling of large volume data in the repair flow. In the case of memory designs, in particular, the number of hotspots in highly repetitive patterns can be enormous, if they are counted from the flattened layout point of view. Since hotspots on repetitive patterns tend to involve processing of repeated patterns, applying pattern matching techniques becomes a natural solution such that only one instance of the repeated patterns is fully re-optimized and its result is copied and pasted over the remaining instances of the same pattern. It is also important to take advantage of the design hierarchy, because flattening of layers in repetitive hierarchical designs can result in data volume expansion that is so massive that even trivial operations such as copying and Boolean operations could become prohibitively slow. We present techniques to exploit pattern matching as well as hierarchical processing to achieve a high performance distributed hotspots reoptimization flow.

To overcome the resolution and throughput of current mask writer for advanced lithography technologies, the platform of e-beam writer have been evolved by the developments of hardware and software in writer. Especially, aggressive optical proximity correction (OPC) for unprecedented extension of optical lithography and the needs of low sensitivity resist for high resolution result in the limit of variable shaped beam writer which is widely used for mass production. The multi-beam mask writer is attractive candidate for photomask writing of sub-10nm device because of its high speed and the large degree of freedom which enable high dose and dose modulation for each pixel. However, the higher dose and almost unlimited appetite for dose modulation challenge the mask data processing (MDP) in aspects of extreme data volume and correction method. Here, we discuss the requirements of mask data processing for multi-beam mask writer and presents new challenges of the data format, data flow, and correction method for user and supplier MDP tool.

Despite significant enhancements in defect detection using optical and e-beam methodology, the smaller length scales and increasing challenges of future technology nodes motivate ongoing research into the need and associated cost of actinic inspection for EUV masks. This paper reports an extensive study of two EUV patterned masks, wherein the mask blank defectivity was characterized using optical (mask and wafer) methods and bright-field mask imaging (using the SHARP actinic microscope) of previously identified blank defects. We find that the bright field actinic imaging tool microscope captures and images many defects that are not seen by the automated optical inspection of patterned masks and printed wafers. In addition, actinic review reveals the impact of multilayer damage and depicts the printability profile which can be used as an added metric to define the patterned mask repair and defect compensation strategies.

In this study, on-wafer printability test results of native blank defects on an EUV reticle, previously detected on the ABI (Actinic blank inspection) tool, were interpreted with on-mask analysis. One of the main factors that affects printability is the relative defect position to the absorber pattern. The ABI tool has been used for this purpose, by means of on-mask review. Subsequently, by removing covered defects (blank defects which are covered with absorber pattern), a clear relationship between DSI (ABI defect signal intensity) and printability was confirmed. By considering a relationship between relative defect position and printability precisely, a tentative printability threshold was defined with DSI. This result suggests that DSI has valuable information to define printability threshold, and shows significance of ABI inspection.

NAP-PD (Native Acting Phase – Programmed Defects), otherwise known as buried program defects, with attributes very similar to native defects, are successfully fabricated using a high accuracy overlay technique. The defect detectability and visibility are analyzed with conventional phase contrast blank inspection @193 nm wavelength, pattern inspection @193 nm wavelength and SEM. The mask is also printed on wafer and printability is discussed. Finally, the inspection sensitivity and wafer printability are compared, leading to the observation that the current blank and pattern inspection sensitivity is not enough to detect all of the printable defects.

This paper discusses defectivity of a black border around the mask pattern of a reticle for extreme EUV lithography. An opaque image border is intended to overcome the limitation of the reticle masking blades of the scanner, in providing sufficiently sharp and accurate image delineation on wafer. The most commonly applied “black border” method for EUV reticles has the multilayer mirror removed in the image border area. A dedicated mask with such etched ML image border has been generated. It includes several modules of patterns, each surrounded by black border, so that each can be imaged separately with minimized background dose caused by its border. The printability of programmed defects within this image border has been assessed on an NXE3100 EUV scanner. Studied defect types include ML pedestals with and without absorber still on top. Especially the former must be totally avoided as such clear defect is very printable and can even erase parts of the pattern in neighboring dies.

Traditional EUV masks, with absorber on top of the multi-layer (ML) mirror, generally suffer from mask 3D effects: H/V shadowing, best focus shifts through pitch and pattern shifts through focus. These effects reduce the overlapping process window, complicate optical proximity correction and generate overlay errors. With further pitch scaling, these mask 3D effects are expected to become stronger, increasing the need for a compensation strategy. In this study, we have proven by simulations and experiments that alternative mask technologies can lower mask 3D effects and therefore have the potential to improve the imaging of critical EUV layers. We have performed an experimental imaging study of a prototype Etched ML mask, which has recently become available. This prototype alternative mask has only half the ML mirror thickness (20 Mo/Si pairs) and contains no absorber material at all. Instead, the ML mirror is etched away to the substrate at the location of the dark features. For this Etched ML mask, we have compared the imaging performance for mask 3D related effects to that of a standard EUV mask, using wafer exposures at 0.33 NA. Experimental data are compared to the simulated predictions and the benefits and drawbacks of such an alternative mask are shown. Besides the imaging performance, we will also discuss the manufacturability challenges related to the etched ML mask technology.

EUV pellicle membranes are being pursued to protect scanner images from repeating defects caused by reticle fall-on particle defects. Because most materials highly absorb EUV, pellicle membranes must be ultrathin. In an attempt to increase the strength of the ultrathin membranes, grid-supported pellicle membranes have been proposed. In this study we compare grid-supported pellicles (GSP) over free-standing pellicles (FSP). We considered imaging, thermal, mechanical, and thermo-mechanical characteristics. Finite Element Methods (FEM) was used to investigate the thermal, and (thermo-)mechanical behavior of pellicles. The maximum temperature reached under operational conditions by the pellicle film was determined. Using a thermo-mechanical analysis wrinkling behavior was quantified. The mechanical analysis considered the influence of grid structures on the sagging behavior, on crack propagation, on the pellicle film resistance to collision with solid particles, and on the resistance to shocks on the pellicle frame. The analysis shows that GSP that meets imaging requirements will not bring any advantages over FSP.

The usage of the extreme ultraviolet (EUV) pellicle is regarded as the solution for defect control since it can protect the mask from airborne debris. However some obstacles disrupt real-application of the pellicle such as structural weakness, thermal damage and so on. For these reasons, flawless fabrication of the pellicle is impossible. In this paper, we discuss the influence of deformed pellicle in terms of non-uniform intensity distribution and critical dimension (CD) uniformity. It was found that non-uniform intensity distribution is proportional to local tilt angle of pellicle and CD variation was linearly proportional to transmission difference. When we consider the 16 nm line and space pattern with dipole illumination (σc=0.8, σr=0.1, NA=0.33), the transmission difference (max-min) of 0.7 % causes 0.1 nm CD uniformity. Influence of gravity caused deflection to the aerial image is small enough to ignore. CD uniformity is less than 0.1 nm even for the current gap of 2 mm between mask and pellicle. However, heat caused EUV pellicle wrinkle might cause serious image distortion because a wrinkle of EUV pellicle causes a transmission loss variation as well as CD non-uniformity. In conclusion, local angle of a wrinkle, not a period or an amplitude of a wrinkle is a main factor to CD uniformity, and local angle of less than ~270 mrad is needed to achieve 0.1 nm CD uniformity with 16 nm L/S pattern.

High-sensitivity EUV mask pattern defect detection is one of the major issues in order to realize the device fabrication by using the EUV lithography. We have already designed a novel Projection Electron Microscope (PEM) optics that has been integrated into a new inspection system named EBEYE-V30 (“Model EBEYE” is an EBARA’s model code), and which seems to be quite promising for 16 nm hp generation EUVL Patterned mask Inspection (PI). Defect inspection sensitivity was evaluated by capturing an electron image generated at the mask by focusing onto an image sensor. The progress of the novel PEM optics performance is not only about making an image sensor with higher resolution but also about doing a better image processing to enhance the defect signal. In this paper, we describe the experimental results of EUV patterned mask inspection using the above-mentioned system. The performance of the system is measured in terms of defect detectability for 11 nm hp generation EUV mask. To improve the inspection throughput for 11 nm hp generation defect detection, it would require a data processing rate of greater than 1.5 Giga- Pixel-Per-Second (GPPS) that would realize less than eight hours of inspection time including the step-and-scan motion associated with the process. The aims of the development program are to attain a higher throughput, and enhance the defect detection sensitivity by using an adequate pixel size with sophisticated image processing resulting in a higher processing rate.

Patterned mask inspection for an etched multilayer (ML) EUV mask was investigated. In order to optimize the mask structure from the standpoint of not only a pattern inspection by using a projection electron microscope (PEM), but also by considering the other fabrication processes using electron beam (EB) techniques such as CD metrology and mask repair, we employed a conductive layer between the ML and substrate. By measuring the secondary electron emission coefficients (SEECs) of the candidate materials for conductive layer, we evaluated the image contrast and the influence of charging effect. In the cases of 40-pair-ML, 16 nm sized extrusion and intrusion defects were found to be detectable more than 10 sigma in hp 44 nm, 40 nm, and 32 nm line and space (L/S) patterns. Reducing 40-pair-ML to 20-pair-ML degraded the image contrast and the defect detectability. However, by selecting B4C as a conductive layer, 16 nm sized defects remained detectable. A double layer structure with 2.5-nm-thik B4C on metal film used as a conductive layer was found to have sufficient conductivity and also was found to be free from the surface charging effect and influence of native oxide.

A high-volume manufacturing (HVM) actinic blank inspection (ABI) prototype could detect a printable phase defect for 16 nm node at almost 100 % of the capture rate. However, although a printable phase defect where the aspect ratio was lower than 0.01 was hardly existed, it was not detected by the HVM ABI prototype. For the purpose that could detect the low-aspect phase defects, scattered light angle from the defect was analyzed. As the result of analysis, an enlargement of the illumination NA was found to enhance the signal intensity of a low-aspect phase defect without any significant influence to the noise signal. The illumination optics of the HVM ABI prototype was improved and the illumination NA was enlarged from 0.07 to nearly 0.1. It was demonstrated that the low-aspect phase defect became to be detectable by the HVM ABI prototype, and no negative influence to other defects was found.

A high volume manufacturing (HVM) model of EUV Actinic Blank Inspection (ABI) tool has been developed for the purpose of detecting phase defects on EUV masks. Simulation has been carried out as to how defect aspect ratio (height/width) and illumination numerical aperture (NA) affect defect signal intensity (DSI). It shows that a higher illumination NA leads to a higher DSI for defects with low-aspect ratios. For example, if the illumination NA is changed from 0.07 to 0.1, DSI is expected to increase 20% or more for defects with an aspect ratio lower than 0.015. The ABI tool has shown an enhanced sensitivity, especially for low-aspect ratio defects, after its NA illumination is raised from its original 0.07 NA to 0.1 NA. Actual inspection results using programmed-defect masks show that DSI has increased significantly for defects with low aspect ratios while the signal intensities for defects with high aspect ratios remain the same.

The retardation of the development of NGL techniques causes the extension of ArF immersion lithography for 1x-nm node. We have been researching the new phase shift mask's (PSM) material for the next generation ArF lithography. In this reports, we developed the low-k, high transmission PSM and evaluate it. The developed new PSM shows good lithographic performance in wafer and high ArF excimer laser durability. The mask processability were confirmed such as the CD performance, the cross section image, the inspection sensitivity and repair accuracy.

To reduce the pattern size in photomask is an inevitable trend because of the minimization of chip size. So it makes a big challenge to control defects in photomask industry. Defects below a certain size that had not been any problem in previous technology node are becoming an issue as the patterns are smaller. Therefore, the acceptable tolerance levels for current defect size and quantity are dramatically reduced. Because these defects on photomask can be the sources of the repeating defects on wafer, small size defects smaller than 200nm should not be ignored any more. Generally, almost defects are generated during develop process and etch process. Especially it is difficult to find the root cause of defects formed during the develop process because of their various types and very small size. In this paper, we studied how these small defects can be eliminated by analyzing the defects and tuning the develop process. There are 3 types of resist defects which are named as follows. The first type is ‘Popcorn’ defect which is mainly occurred in negative resist and exists on the dark features. The second type is ‘Frog eggs’ defect which is occurred in 2nd process of HTPSM and exists on the wide space area. The last type is ‘Spot’ defect which also exists on the wide space area. These defects are generally appeared on the entire area of a plate and the number of these defects is about several hundred. It is thought that the original source is the surface’s hydrophilic state before develop process or the incongruity between resist and developer. This study shows that the optimizing the develop process can be a good solution for some resist defects.

Resist heating effect which is caused in electron beam lithography by rise in substrate temperature of a few tens or hundreds of degrees changes resist sensitivity and leads to degradation of local critical dimension uniformity (LCDU). Increasing writing pass count and reducing dose per pass is one way to avoid the resist heating effect, but it worsens writing throughput. As an alternative way, NuFlare Technology is developing a heating effect correction system which corrects CD deviation induced by resist heating effect and mitigates LCDU degradation even in high dose per pass conditions. Our developing correction model is based on a dose modulation method. Therefore, a kind of conversion equation to modify the dose corresponding to CD change by temperature rise is necessary. For this purpose, a CD variation model depending on local pattern density was introduced and its validity was confirmed by experiments and temperature simulations. And then the dose modulation rate which is a parameter to be used in the heating effect correction system was defined as ideally irrelevant to the local pattern density, and the actual values were also determined with the experimental results for several resist types. The accuracy of the heating effect correction was also discussed. Even when deviations depending on the pattern density slightly remains in the dose modulation rates (i.e., not ideal in actual), the estimated residual errors in the correction are sufficiently small and acceptable for practical 2 pass writing with the constant dose modulation rates. In these results, it is demonstrated that the CD variation model is effective for the heating effect correction system.

Critical Dimension (CD) Uniformity is one of the necessary parameters to assure good performance and reliable functionality of any integrated circuit (IC), and towards the advanced technology node 28nm and beyond, corresponding CD Uniformity becomes more and more crucial. It is found that bad mask CD Uniformity is a significant error source at 28nm process. The CD Uniformity on mask, if not controlled well, will badly impact wafer CD performance, and it has been well-studied that CD Uniformity issue from gate line-width in transistors would affect the device performance directly. In this paper we present a novel solution for mask global CD uniformity error correction, which is called as global loading effect correction (GLEC) method and applied nesting in the mask exposure map during the electron beam exposure. There are factors such as global chip layout, writing sequence and chip pattern density distribution (Global Loading), that work on the whole mask CD Uniformity, especially Global Loading is the key factor related to mask global CD error. From our experimental results, different pattern density distribution on mask significantly influenced the final mask CD Uniformity: the mask with undulating pattern density distribution provides much worse CD Uniformity than that with uniform one. Therefore, a GLEC model based on pattern density has been created to compensate the global error during the electron beam exposure, which has been proved to be efficacious to improve mask global CD Uniformity performance. Furthermore, it ’s also revealed that pattern type is another important impact factor, and GLEC coefficient need be modified due to the specific pattern type (e.g. dense line-space only, iso-space only or an average of them) to improve the corresponding mask CD uniformity.

We made a steady progress in designing a maskless exposure system using the point array technique. An epoch-making high-resolution maskless lithography system with resolution of less than 1 micron half-pitch has been developed. Exposure results indicated that patterns were resolved up to 0.8 microns half-pitch. Smooth edges of the photoresist for various directions were also confirmed. It is distinctive characteristics of the point array technique. Another merit is coexistence of high resolution and high throughput. 4 inches wafers used in this evaluation were exposed within 30 minutes. Therefore, we consider that tact time of manufacturing a photomask can be shortened drastically. Finally we have challenged to apply an annular stop to our new projection optics system in order to achieve further improvement of optical performance. However, we confirmed that a sidelobe of optical spots, which became stronger by using the annular stop, exerted an undesirable influence upon imaging for fine patterns. Consequently, it became clear that suppressing the sidelobe as well as narrowing the mainlobe of optical spots is important for microlithography using the point array technique.

For over 2 decades the AIM^TM platform has been utilized in mask shops as the standard for actinic review of photomask sites in order to perform defect disposition and repair review. Throughout this time the measurement throughput of the systems has been improved in order to keep pace with the requirements demanded by a manufacturing environment, however the analysis of the sites captured has seen little improvement and remained a manual process. This manual analysis of aerial images is time consuming, subject to error and unreliability and contributes to holding up turn-around time (TAT) and slowing process flow in a manufacturing environment. AutoAnalysis, the first application available for the FAVOR® platform, offers a solution to these problems by providing fully automated data transfer and analysis of AIM^TM aerial images. The data is automatically output in a customizable format that can be tailored to your internal needs and the requests of your customers. Savings in terms of operator time arise from the automated analysis which no longer needs to be performed. Reliability is improved as human error is eliminated making sure the most defective region is always and consistently captured. Finally the TAT is shortened and process flow for the back end of the line improved as the analysis is fast and runs in parallel to the measurements. In this paper the concept and approach of AutoAnalysis will be presented as well as an update to the status of the project. A look at the benefits arising from the automation and the customizable approach of the solution will be shown.

In a Photomask manufacturing process, mask defect inspection is an increasingly important topic for 193nm optical lithography. Further extension of 193nm optical lithography to the next technology nodes, staying at a maximum numerical aperture (NA) of 1.35, pushes lithography to its utmost limits. This extension from technologies like ILT and SMO requires more complex mask patterns. In mask defect inspection, defect verification becomes more difficult because many nuisance defects are detected in aggressive mask features. One of the solutions is lithography simulation like AIMS. An issue with AIMS, however, is the low throughput of measurement, analysis etc.

AIMS^TM is mainly used in photomask industry for verifying the print impact of mask defects on wafer CD in DUV lithography process. AIMS verification is typically used in D2D configuration, wherein two AIMS images, reference and defect, are captured and compared. Criticality of defects is then analyzed off these images using a number of criteria. As photomasks with aggressive OPC, sub-resolution assist features (SRAFs), and single-die are being routinely manufactured in production environment, it is required to improve cycle time through the AIMS step by saving time in searching for and capturing an adequate reference AIMS image. One solution is to use AIMS D2DB methodology which compares AIMS defect image with a reference image simulated from the corresponding mask design data. In general, such simulation needs calibration with the native images captured on the AIMS tool. In our previous paper we evaluated a calibration procedure directly using the defect AIMS image and compared the analysis results with a D2D capture using AIA (Aerial Image Analyzer) software product from Luminescent Technologies (now part of KLA-Tencor Corporation). The results showed that calibration using defect AIMS image does not influence AIMS judgment as long as the defect size is less than 100nm in case of typical basic patterns. When applying this methodology to product patterns, it was found that there were differences between reference AIMS image and simulation image. These differences influenced AIMS verification. Then new method to compensate would be needed. Our approach to compensate the difference between AIMS image and simulated image is examination with some factors likely to cause the difference.

A blank mask and its preparation stages, such as cleaning or resist coating, play an important role in the eventual yield obtained by using it. Blank mask defects’ impact analysis directly depends on the amount of available information such as the number of defects observed, their accurate locations and sizes. Mask usability qualification at the start of the preparation process, is crudely based on number of defects. Similarly, defect information such as size is sought to estimate eventual defect printability on the wafer. Tracking of defect characteristics, specifically size and shape, across multiple stages, can further be indicative of process related information such as cleaning or coating process efficiencies. At the first level, inspection machines address the requirement of defect characterization by detecting and reporting relevant defect information. The analysis of this information though is still largely a manual process. With advancing technology nodes and reducing half-pitch sizes, a large number of defects are observed; and the detailed knowledge associated, make manual defect review process an arduous task, in addition to adding sensitivity to human errors. Cases where defect information reported by inspection machine is not sufficient, mask shops rely on other tools. Use of CDSEM tools is one such option. However, these additional steps translate into increased costs. Calibre NxDAT based MDPAutoClassify tool provides an automated software alternative to the manual defect review process. Working on defect images generated by inspection machines, the tool extracts and reports additional information such as defect location, useful for defect avoidance^[4][5]; defect size, useful in estimating defect printability; and, defect nature e.g. particle, scratch, resist void, etc., useful for process monitoring. The tool makes use of smart and elaborate post-processing algorithms to achieve this. Their elaborateness is a consequence of the variety and complexity of defects encountered. The variety arises due to factors such as defect nature, size, shape and composition; and the optical phenomena occurring around the defect. This paper focuses on preliminary characterization results, in terms of classification and size estimation, obtained by Calibre MDPAutoClassify tool on a variety of mask blank defects. It primarily highlights the challenges faced in achieving the results with reference to the variety of defects observed on blank mask substrates and the underlying complexities which make accurate defect size measurement an important and challenging task.

Photolithography process is getting more and more sophisticated for wafer production following Moore’s law. Therefore, for wafer fab, consolidated and close cooperation with mask house is a key to achieve silicon wafer success. However, generally speaking, it is not easy to preserve such partnership because many engineering efforts and frequent communication are indispensable. The inattentive connection is obvious in mask rule check (MRC). Mask houses will do their own MRC at job deck stage, but the checking is only for identification of mask process limitation including writing, etching, inspection, metrology, etc. No further checking in terms of wafer process concerned mask data errors will be implemented after data files of whole mask are composed in mask house. There are still many potential data errors even post-OPC verification has been done for main circuits. What mentioned here are the kinds of errors which will only occur as main circuits combined with frame and dummy patterns to form whole reticle. Therefore, strategy optimization is on-going in UMC to evaluate MRC especially for wafer fab concerned errors. The prerequisite is that no impact on mask delivery cycle time even adding this extra checking. A full-mask checking based on job deck in gds or oasis format is necessary in order to secure acceptable run time. Form of the summarized error report generated by this checking is also crucial because user friendly interface will shorten engineers’ judgment time to release mask for writing. This paper will survey the key factors of MRC in wafer fab.

Precision control of critical dimensions (CD) in modern photomask manufacturing is conventionally accomplished by measuring of CD check patterns allocated inside photomask area. Recently, due to use of immersion and High-NA processes for ArF scanners surface of photomask is subjected to higher energy exposure. Such high energy exposure not only increases the loading effect and the flare but also brings about additional issues such as Cr migration and degradation of MoSi film quality due to its surface oxidation which become a new source of CD deviation. Such phenomenon influence both local pattern shape and its dependence on pattern density and global pattern density and arrangement. To achieve good control of CD in such global environment it is required to measure patterns in the chip device area equivalent to CD check patterns allocated on that chip. However, it is extremely difficult to accurately extract coordinates of patterns for CD measurements inside large device of the chip. We have developed a system in which firstly, using design rule check (DRC) method we extract from the chip device area simple line and space (L/S) patterns similar to CD check patterns and secondly, after bitmap transformation of the extraction result use a convolution operation approach to determine the patterns to measure. We confirmed that our method enables selection of CD measurement points with good reproducibility and stability. Next, we report on details of our method to extract CD measurement points and demonstrate its usefulness due to its excellent reproducibility and stability.

Sub-Resolution Assist Features (SRAFs) have emerged as a key technology to enable semiconductor manufacturing for advanced technology nodes. SRAF placement is required to adhere to manufacturability constraints (MRC). MRC specifications are distance and size constraints specified by the user to ensure SRAFs are not detrimental to the final target shapes being printed. Conceptually, SRAF placement can be divided into two steps - SRAF candidate generation and SRAF candidate cleanup or conflict resolution. SRAFs generated as candidates may not adhere to MRC constraints. It is during the cleanup/conflict resolution process that the MRC constraints are enforced. In this paper we focus on the latter phase - cleanup. The goal of the cleanup phase is to retain as much of the initial candidates as possible, and, if necessary, transform them to adhere to MRC conditions. An SRAF is said to be in conflict with another shape if it violates the distance MRC constraint. One can model these conflicts using a conflict graph G=(V,E), whose vertices V correspond to geometric shapes involved in a conflict and an edge is present in E, between two vertices if the corresponding shapes are involved in a conflict. A weight is associated with each vertex that could, for example, correspond to area of the corresponding shape. The goal of conflict resolution then, is to find a transformation of the vertices so that the resulting graph is conflict free while maximizing the weight of vertices retained. This can be viewed as a generalization of the computationally hard problem of finding the largest independent set of candidates, albeit allowing for transformation. The transformations we allow include deletion, splitting, resizing, merge, and bounded translation. In this paper, we describe an approach which classifies the conflicts and apply appropriate transformations to achieve effective SRAF placement. Further, we demonstrate that such a strategy reduces the number of rules to be specified by the user, reducing the user effort needed to achieve desirable imaging results.

The backside of photomasks have been largely ignored during the last several decades of development, with the exception of avoiding gross damage or defects, as almost all problems are far enough out of the focal plane to have minimal effect on imaging. Since EUV masks are reflective, and the column is held in a vacuum, scanners have been designed to utilize electrostatic chucking. With the chucking system for EUV, the requirements for the backside of the mask must be redefined to integrate concerns in substrate design, mask manufacturing, and usage. The two key concerns with respect to an electrostatic chuck are defects and durability. Backside defects can affect imaging, while potentially damaging or contaminating the tool, the mask, or even subsequently used masks. Compromised durability, from either usage or cleaning, can affect the ability of the chuck to hold the mask in place. In this study, these concerns are evaluated in three stages: minimizing defects created during mask fabrication, actions taken upon discovery of defects, and durability of the backside film with continued cleans and chucking. Data incorporated in this study includes: sheet resistance, film thickness, and optical inspection images. Incorporating the data from the three stages of fabrication, disposition, and lifetime will help us define how to structure backside EUV mask handling during mask manufacture and indicate what further solutions are needed as EUV technology transitions into manufacturing.

The EUV mask readiness is ranked under the top three challenges for successful introduction of EUV into high volume manufacturing. Whereas the basic mask manufacturing processes can be principally taken over from optical mask manufacturing, the big amount of new materials incorporated in the relatively complicated EUV mask stack is causing new effects either by their chemical and physical nature, or by their interaction with the processes. Some of the major challenges for EUV mask manufacturing compared to the optical mask is the EUV mask lifetime. First of those is the high illumination energy, which is expected to introduce changes in the mask stack, degradation of the pattern fidelity and reflectivity of the EUV mask. Also EUV mask manufacturing processes influence the mask lifetime. Few of those processes used over decade for successful manufacturing of optical mask can be used for manufacturing of EUV mask, which however will not perform very well and will impact mask lifetime. Interactions between unit processes were identified, influencing not only the pristine mask performance, but impacting their lifetime as well. In our work mainly the interaction between EUV etch and dedicated EUV cleaning process is investigated. Mainly the absorber etch process is dominantly determining the actinic reflectivity and its uniformity across the mask. Additionally the etch process is interacting with the clean process and limits the threshold for mask properties change due to clean process. Finally modification of surface layer and the presence (or absence) of Ru-based capping layer are critical factors for overall EUV mask properties and stability.

We studied various particle defects such as Fe, Al, and SiO₂ which are frequently generated during extreme ultraviolet lithography (EUVL). It is important to find the critical sizes of the defect that do not make 10% critical dimension (CD) error because the defect causes CD variation. We found that the critical size of a defect was dependent on the extinction coefficient of the defect material and the particle defect with larger extinction coefficient made smaller critical size that could make 10% CD error. In addition it is needed to study the critical size of the defect which is located on the side of the absorber because it is hard to clean the location. We investigated the defect, which was located on the left side of absorber, affect more on patterning. Also arbitrary shape of defect is studied. As a result, the aerial image is most sensitive with defect area over the length and the height of the defect.

Mo/Si multilayer mirror with 300-bilayers for EUV lithography is developed for the purpose of long-lifetime use in LPP EUV source. The multilayer mirrors are fabricated by a magnetron sputtering method and are characterized by coherence scanning interferometry, XRR and EUV reflectometer. The results show the excellent performance of 320 layer pair multilayer being useful for EUV multilayer mirror.

Lithography is frequently used for fabrication of micro-components such as flexible print circuits, microfluidic devices and lens arrays. However, low-cost lithography tools with large exposure areas appropriate for such applications are not commercially available. It is thought that a scan-exposure system using a gradient-index lens array as a projection lens matches such requirements. However, in spite of adding back-and-forth sub-scans in the direction perpendicular to the main scan, unevenness of the light intensity was not completely removed, in the past research, and partial degradations of resolution were observed here and there in the field. For this reason, causes of intensity unevenness and resolution degradation were investigated here. In concrete, 30-μm line-and-space patterns were printed without any scans to confirm whether element lenses were arranged regularly and patterns were stitched smoothly. Pattern shifts between upper and lower element lenses of the 2-line gradient-index lens array were measured at every contact point of neighbored element lenses. As a result, it was clarified that patterns printed by neighbored lenses were not always stitched smoothly. It was considered that degradation of resolution and unexpected pattern-width distribution were caused by large pattern shifts observed in some places. It is necessary to adopt sub scans as fast and long as possible for improving the pattern-width homogeneity, and to limit the patterning area to where the pattern shifts are comparatively small for improving the resolution.

A new method to print patterns with very sharp vertical side walls in thick negative resist SU-8 was investigated. In addition, the technology was swiftly applied to fabrication of microfluidic devices. At first, 50-μm line-and-space patterns were printed using SU-8 with a thickness of 100 μm. When the best focal position for the thin resist film with a thickness of approximately 1 μm is defined as the focus origin, vertical sidewalls were obtained at defocus positions of between +2,400 μm and +3,000 μm. The profiles became the best at the defocus of +2,400 μm. Here, the plus defocus means that wafers were lowered far from the lens. It was considered that the excellent profiles were obtained because the light intensity decrease caused by the absorption in the resist was just balanced with the degradation and extent of positional light-intensity distribution caused by the intentional defocus. Using the technology, various flow- path patterns of microfluidic devices were successfully fabricated.

There are great advantages in cost and simplicity, if exposure sources in lithography systems for printing two dimensional code marks are changed from ultra-high-pressure mercury lamps to light emitting diodes (LEDs). For this reason, a prototype exposure system was developed, and it was demonstrated that two dimensional code marks were successfully printed using LEDs as exposure sources and a squared plastic optical fiber matrix as code-mark cells. In addition, it was also verified that suitably printed code marks were directly readable using a commercially available code-mark reader. However, readability for various marks has not been investigated sufficiently. For this reason, the readability was investigated in detail by variously changing lighting maps of LEDs, here. Readable ratios of code marks printed under short exposure-time conditions were investigated in particular to clarify the redundancy and margin for the exposure dose and mark-quality degradation. As test code marks, 6 figure numbers such as 111111, 222222,…777777 were used. This is because not to make LEDs which are not lightened. As a result, all the code marks printed with good profiles and almost no resist residues were correctly read. In addition, code marks with slight resist residues were also readable. It was clarified that amount of resist residues in the data area greatly influenced the readability.

In extreme ultraviolet (EUV) lithography, the three-dimensional (3D) structure of the EUV mask, which has an absorber layer and a Mo/Si multilayer on a glass substrate, strongly affects the EUV phase. EUV actinic metrology is required to evaluate the feature of defect printability and the critical dimension (CD) value. The 3D structure modulates the EUV phase, causing the pattern position and focus shift. A microscope that observes in phase contrast necessary. We have developed a coherent EUV scatterometry microscope (CSM) for observing EUV patterns with quantitative phase contrast. The exposure light is coherent EUV light. For the industrial use, we have developed a laboratory coherent source of high-harmonic-generation (HHG) EUV light. High harmonics is pumped by a scale of a Ti:Sapphire laser. In the previous study, a very long exposure time of 1000 s was necessary to detect We upgraded the relay optics. The detection performance of an absorber defect using the new relay optics is We observed the line-end oversize defect and the oversize defect in the 112 nm hole pattern and 180 nm hole pattern. The upgraded system has a detection size limit of a line-end 24-nm-oversize defect with 10 s exposure time, which is 2,688 nm² (52 × 52 nm²) absorber defect. This result shows high performance capability of HHG-CSM for detecting small defect.

In extreme-ultraviolet (EUV) lithography, mirror optics is coated with a Mo/Si multilayer film. Since throughput of an EUV system is directly depends on the multilayer film reflectance, we have developed a mask reflectometer to evaluate the reflectance in BL-10 beamline of the NewSUBARU synchrotron facility. In particular, the EUV output power from a EUV light source relates to the reflectance of a collector mirror. Thus, we installed a new large reflectometer in BL-10 beamline to evaluate the collector mirror reflectance. The reflectometer can measure a mirror with a diameter of up to 800 mm, a thickness of 250 mm, and a weight of 50 kg. The entire sample surface can be measured in spherical coordinate using vertical γ and rotation Φ axis. Each axis positions are measured with optical encoders precisely, and are controlled in closed-loop operation. We measured reflectance of an EUV mask using the large reflectometer and the mask reflectometer. The peak reflectance was well consisted with the two reflectometer within 0.1%. The large reflectometer has high reproducibility of the peak reflectance measurement.

The effect of sub-ns duration and sub-mJ energy laser pulse on 13.5 nm extreme ultraviolet (EUV) source diameter and conversion efficiency has been investigated. It was demonstrated that an in-band EUV source diameter as low as 18 μm has been produced due to short scale length of the picoseconds duration laser plasma. Such EUV source is suitable for high brightness and high repetition rate metrology applications.

We evaluate the EUV emission and the spatial distributions of the plasma parameters by use of the two-dimensional (2-D) radiation hydrodynamic simulation in the microplasma high-brightness EUV source. The expected EUV source size, which is attributed to the expanding microplasma by the hydrodynamic motion, was evaluated to be 15 μm at the laser pulse duration of 150 ps [full width at half-maximum (FWHM)]. The numerical simulation suggests that the high brightness EUV source should be produced by use of a dot target based microplasma with the source diameter less than 20 μm. The emission at 13.5 nm was attributed to Sn charge states between Sn⁷⁺ and Sn¹²⁺ with the UTA spectral structure.

To realize extreme ultraviolet (EUV) lithography for mass production of semiconductor devices, enhancements of performance of chemically amplified resist have been still important issue. In EUV resist, radiation chemical reactions occur after irradiations of the EUV light. Dynamics of chemical intermediates of EUV resist after exposure to the ionizing radiations is important for understanding new resist design. Fluorinated resists have been developed for ArF, F2, and EUV lithography. Fluorinated polymers are effective to enhance the sensitivity of the EUV resist because F atom has higher absorptivity of EUV photons. However, the fluorination effect on the radiation chemical reactions in the resist has not been clarified in detail. In this study, we investigated the dynamics of radical ions of fluorinated polymers (FPs) by pulse radiolysis method and quantum chemical calculations to clarify the reaction mechanism for EUV lithography.