A high performance CCD area image sensor has been designed and fabricated with a maximized average quantum efficiency over the wavelength range 500 to 900 nm; an average quantum efficiency of 50 percent was achieved. A multi-deposition polysilicon gate technology, supplemented by silicon nitride, was used. The measured response spectrum has the same major features as the computer generated spectrum for the optimum structure, although the measured spectrum is distinctly smoother. The CCD image sensor is of the time delay and integration (TOT) type. This paper describes the CCD image sensor configuration, the details of the unit cell, and the computer model boundary conditions, such as what layer thicknesses were allowed. A large number of layer-thickness designs were run on computer; the results are summarized. The wafer processing sequence is outlined. Possible explanations for the differences between theory and experiment are presented.