A study has been conducted to show the feasibility of implementing an all-digital correlator for missile terminal area guidance. The central thrust of this effort was to establish the hardware requirements for realizing multiple area cross-correlations in real-time using modern digital signal processing techniques. The ultimate objective of the study is the improvement in terminal accuracy of long-range Army missiles through digital area correlation guidance. The approach taken in this study was to determine a computationally efficient algorithm, verify its theoretical performance relative to the conventional multiply and sum correlation procedure, and to estimate the hardware resources necessary to compute the recommended algorithm in real-time. The algorithm recommended for implementation is the high speed digital correlation algorithm which uses the fast Fourier transform (FFT) to minimize the total number of arithmetic computations. The computational equivalence of the high speed correlation algorithm to the conventional multiply and sum approach was demonstrated by example using a digital computer program and simulated two-dimensional test data. A specific all-digital correlator hardware design has been postulated and documented at the block diagram level. This design was used to estimate the number of integrated circuits, as well as the power and space requirements, of an all-digital area correlator.