Development Of An Optical Parallel Logic Device And A Half-Adder Circuit For Digital Optical Processing

Ravindra A. Athale; Sing H. Lee

doi:10.1117/12.938251

8 December 1978 Development Of An Optical Parallel Logic Device And A Half-Adder Circuit For Digital Optical Processing

Ravindra A. Athale, Sing H. Lee

Proceedings Volume 0154, Real-Time Signal Processing I; (1978) https://doi.org/10.1117/12.938251
Event: 22nd Annual Technical Symposium, 1978, San Diego, United States

Abstract

An Optical Parallel Logic (OPAL) device which performs Boolean algebraic operations on binary images has been developed. This device consists of a photoconductor and an electro-optic light modulating material appropriately arranged to bring about an interaction between the input signals. Two such OPAL devices have been interconnected to form a half-adder circuit which is one of the essential components of the CPU in a futuristic digital optical processor. Operation of an 8 x 8 OPAL device containing CdS (photoconductor) and twisted nematic liquid crystal (electrooptic light modulating material) was demonstrated. A contrast ratio of 20:1 was obtained. A circuit composed of two such devices was shown to perform addition of two 8 x 8 binary images generating SUM and CARRY images.

Citation Download Citation

Ravindra A. Athale and Sing H. Lee "Development Of An Optical Parallel Logic Device And A Half-Adder Circuit For Digital Optical Processing", Proc. SPIE 0154, Real-Time Signal Processing I, (8 December 1978); https://doi.org/10.1117/12.938251

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