On-Board Satellite Signal Processing And Simulation

H. H. Bailer

doi:10.1117/12.959244

24 December 1980 On-Board Satellite Signal Processing And Simulation

H. H. Bailer

Proceedings Volume 0241, Real-Time Signal Processing III; (1980) https://doi.org/10.1117/12.959244
Event: 24th Annual Technical Symposium, 1980, San Diego, United States

Abstract

A contractual study of Advanced On-Board Satellite Signal Processor technology (DARPA, USAF-RADC Contract F30602.78.C.0028) included, in part, evaluation of various processor architectures and integrated circuit components for use with military sensor systems, especially electro-optical and radar, for the era of the late 1980's. High level architectural tradeoff studies were performed in a novel application of the simulation language, ECSS/Simscript. Typical statistical results of the simulation are shown, illustrating how the data are used to measure throughput, to estimate prime power needs to discover contention in array processing, and to provide preliminary guidelines for allocation and proportioning of signal processor resources. Component studies indicated that a programmable high speed signal processor element containing logic, control, and local memory could be realized perhaps on a single VLSI chip. Array architectures evaluated by simulation were capable of satisfying a wide spectrum of mission requirements. Anticipated progress in military and commercial IC technology should provide a basic pro-cessing element adequate for all needs. The switching and management of data flow to and from bulk memory, which appears to be a very difficult software analysis problem, can be eased by guidelines derived from simulation.

Citation Download Citation

H. H. Bailer "On-Board Satellite Signal Processing And Simulation", Proc. SPIE 0241, Real-Time Signal Processing III, (24 December 1980); https://doi.org/10.1117/12.959244

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