The architecture of a programmable signal processor which directly supports high-level signal processing functions is described. The instruction set of this processor is the result of a prior study of the mathematical processes involved in a diverse range of signal processing applications. Primary features of this instruction set are instruction factor-ing and the separation of data parameters from program parameters. The instruction factoring technique suggests an underlying technology-independent architecture which allows many efficient, yet flexible implementations. Some example implementations are described, including implementations being developed for the Advanced Onboard Signal Processor (AOSP) program.