The Texas Instruments VHSIC-1 Program is based on a small set of multi-use programmable system components implemented in commercially aligned semiconductor technologies; a multimode fire-and-forget missile subsystem demonstration brassboard and a comprehensive set of software/hardware design tools to support subsystem design with the basic chip set. Eight chips have been defined and are currently under development. There is a high performance NMOS memory and 7 logic oriented components that will be implemented in Schottky Transistor Logic (STL). NMOS was selected for the memory because of the high density, low power and low cost intrinsic to the technology. STL was selected for the logic components because of inherent reliability and tolerance for the military environment and exceptional speed power product characteristics. Many DOD suggested candidate VHSIC brassboard systems share several basic IC related requirements IC related requirements such as: 0 Memory - high performance, low cost. 0 Data processing - data dependent arithmetic, logic and control operations on unstructured data streams. 0 Array processing - repetitive data independent operations on fixed size blocks of data. 0 Limited special purpose processing and interface - some application specific requirements must be supported. The Texas Instruments chip set and related design support tools have been architected and specified to accommodate these needs. The complete chip set is shown in Table 1. The STL logic chips are grouped according to their association with data as array processing requirements. The NMOS SRAM is shown separately. Key specifications for each component are given in the right hand column. A brief functional description of the chips as they apply to the requirements follows. The design support tools will be discussed later with the Design Utility System.
H. Dean Toombs, H. Dean Toombs,
"Programmable Systems Components A Comprehensive Approach To Signal Processing", Proc. SPIE 0298, Real-Time Signal Processing IV, (30 July 1982); doi: 10.1117/12.932530; https://doi.org/10.1117/12.932530