In a mainframe computing system, the transfer of data between the processor/memory and the input/output/storage subsystems is done on the I/O channel links. With the demands for computing power increasing at above 40% per year, there is an ever increasing demand for more channel links and more performance on the link. Recent enhancements of the channel protocols make it possible to push the data transfer rate to the hardware limit due to the skew of bits on the parallel lines of the current link. The serialization of the interface with a fiber optic implementation would offer the potential of even more performance from the I/O Channel. For fiber optics to be attractive, the components must offer performance in the hundreds of Mbits/sec, with high reliability (less than 10-12 BER), low power consumption, small packaging profile, and low cost. To date, such components are not commercially available. At IBM Research, a 200 Mbit/sec, 1 km prototype serial subsystem has been built with emphasis on the development of attractive electro-optic components. Laser packaging was done using a Si chip as the substrate for both laser and fiber. A single chip, high sensitivity receiver was built with a digital IBM logic gate array chip. A monolithic dual laser chip and package were developed to enhance the availability of the transmitter. This talk will discuss the features of these developments and the possibilities for fiber optics in a large computer system.