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28 December 1982 S-1 Multiprocessor System
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Proceedings Volume 0341, Real-Time Signal Processing V; (1982) https://doi.org/10.1117/12.933729
Event: 1982 Technical Symposium East, 1982, Arlington, United States
Abstract
This paper describes the S-1 multiprocessor system. It is composed of 16 supercomputer class uniprocessors with local caches, an extremely large, medium latency shared memory, and a low latency synchronization bus for passing short messages. The system is applicable to a wide variety of applications, including large-scale physical simulation, real-time command and control, and program development in a time-sharing environment. The hardware organization, its implications, and software supporting the efficient utilization of the multiprocessor are discussed.
© (1982) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. M. Broughton, P. M. Farmwald, and T. M. McWilliams "S-1 Multiprocessor System", Proc. SPIE 0341, Real-Time Signal Processing V, (28 December 1982); https://doi.org/10.1117/12.933729
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