Inexpensive, efficient VLSI circuits combined with a highly parallel systolic architecture will allow the construction of one gigaflop linear algebra processors for signal processing. This paper presents some results in increasing the efficiency of such processors to 100%.
John H. Avila,
Philip J. Kuekes,
"A One Gigaflop VLSI Systolic Processor", Proc. SPIE 0431, Real-Time Signal Processing VI, (28 November 1983); doi: 10.1117/12.936454; https://doi.org/10.1117/12.936454