31 May 1984 Silicon Material Phenomena In VLSI Circuit Processing
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The VLSI era will require increased Active Electronic Gate (AEG) density and reduced IC leakage current. The fabrication of circuits to achieve these ends, however, is often accompanied by process-induced defects which degrade the desired circuit characteristics. This brief review will highlight the influence of several point, line and surface defects on the fabrication and electrical characteristics of devices/IC's. Several examples of bulk defect gettering and lithographic processes resulting in unique device/IC configurations to reduce these deleterious effects will then be described.
© (1984) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Howard R. Huff, Howard R. Huff, } "Silicon Material Phenomena In VLSI Circuit Processing", Proc. SPIE 0463, Advanced Semiconductor Processing/Characterization of Electronic/Optical Materials, (31 May 1984); doi: 10.1117/12.941338; https://doi.org/10.1117/12.941338


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