Paper
29 January 1985 A Direct Writing Electron Beam Lithography Based Process For The Realisation Of Optoelectronic Integrated Circuits
W. A. Hughes, J. A. Barnard
Author Affiliations +
Proceedings Volume 0517, Integrated Optical Circuit Engineering I; (1985) https://doi.org/10.1117/12.945135
Event: 1984 Cambridge Symposium, 1984, Cambridge, United States
Abstract
A 3 inch GaAs optoelectronic integrated circuit (OEIC) process has been developed for the fabrication of an integrated optical detector array Initial work has concentrated on a 16 element array plus amplifier operating in the 2-3 GHz frequency range. The detecting elements can be Schottky barrier photodiodes, photoconductive detectors, or optical MESFETs, whilst the amplification network is based on 1 µm gate length MESFETs with a 2 source-to-drain spacing. Direct writing electron beam lithography is employed for both pattern definition and automatic pattern registration, giving linewidth and alignment tolerances of better than 0.2 μ,m. The active regions of the FET are doped n-type using ion implantation of Si29.
© (1985) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
W. A. Hughes and J. A. Barnard "A Direct Writing Electron Beam Lithography Based Process For The Realisation Of Optoelectronic Integrated Circuits", Proc. SPIE 0517, Integrated Optical Circuit Engineering I, (29 January 1985); https://doi.org/10.1117/12.945135
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KEYWORDS
Semiconducting wafers

Field effect transistors

Photonic integrated circuits

Gallium arsenide

Electron beam lithography

Optical alignment

Resistors

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