2 February 1988 Survey Of High Speed Test Techniques
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Proceedings Volume 0795, Characterization of Very High Speed Semiconductor Devices and Integrated Circuits; (1988) https://doi.org/10.1117/12.940926
Event: Advances in Semiconductors and Semiconductor Structures, 1987, Bay Point, FL, United States
The emerging technologies for the characterization and production testing of high-speed devices and integrated circuits are reviewed. The continuing progress in the field of semiconductor technologies will, in the near future, demand test techniques to test 10ps to lOOps gate delays, 10 GHz to 100 GHz analog functions and 10,000 to 100,000 gates on a single chip. Clearly, no single test technique would provide a cost-effective answer to all the above demands. A divide-and-conquer approach based on a judicial selection of parametric, functional and high-speed tests will be required. In addition, design-for-test methods need to be pursued which will include on-chip test electronics as well as circuit techniques that minimize the circuit performance sensitivity to allowable process variations. The electron and laser beam based test technologies look very promising and may provide the much needed solutions to not only the high-speed test problem but also to the need for high levels of fault coverage during functional testing.
© (1988) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tushar Gheewala, Tushar Gheewala, } "Survey Of High Speed Test Techniques", Proc. SPIE 0795, Characterization of Very High Speed Semiconductor Devices and Integrated Circuits, (2 February 1988); doi: 10.1117/12.940926; https://doi.org/10.1117/12.940926

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