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13 October 1987 VLSI Memory Management for an Eight Gigabit/s Memory System
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Proceedings Volume 0845, Visual Communications and Image Processing II; (1987) https://doi.org/10.1117/12.976524
Event: Cambridge Symposium on Optics in Medicine and Visual Image Processing, 1987, San Diego, CA, United States
Abstract
This paper describes two ASIC devices which are the building blocks for the memory management of an 8 Megabyte Video Memory system. The devices are used in tandem to synchronize, buffer, multiplex, and execute 256 million 4 byte I/O requests per second for a total transfer capacity of 8 Giga-bits per second. Requests are communicated to the memory over 16 asynchronous channels. The first device, the Memory Channel Interface (MCI), synchronizes, buffers, and routes incoming address, data, and control bits from the input/output channels to the second ASIC device, the Memory Module Interface (MMI). The MMI device interfaces the MCI with static memory chips, and produces the proper control signals for the memory's operation. The MCI and MMI devices allow the high performance Video Memory to be realized with approximately 150 devices.
© (1987) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Antonio Fernandez, Martin Jaquez, and John Robbins "VLSI Memory Management for an Eight Gigabit/s Memory System", Proc. SPIE 0845, Visual Communications and Image Processing II, (13 October 1987); https://doi.org/10.1117/12.976524
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