18 May 1988 Flash-Type A/D Converters And Shift Registers
Author Affiliations +
Abstract
We have studied a variety of circuits for low-accuracy (4-bit) A/D converters; these have been of two types. The "periodic-threshold" type requires only one comparator for each bit. The "fully parallel" configuration requires one comparator for each digital level (15 for 4 bits). Results for both types of A/D converter will be sum-marized. The periodic-threshold type of circuit depends on the quan-tum interferometric property of Superconducting QUantum Interference Devices (SQUIDs). Periodic-threshold circuits using two junction SQUIDs are limited to 1-2 GHz of analog bandwidth. Two different circuits for the fully parallel type of A/D converter circuit have been studied. One employs latching comparators for each of the levels and the comparators drive a novel binary encoder. Simulations show that the analog bandwidth is at least 3.5 GHz. Another fully parallel A/D converter circuit uses the bistability of a single junction SQUID to achieve high sensitivity, and the rapid switching of such a SQUID to obtain the short aperture time needed for wideband A/D conversion. Simulations indicate an analog bandwidth of about 5 GHz. Our simulations of shift-register circuits show that a circuit with a three-phase clock and three AND gates per bit can operate at least to 25 GHz. A two-phase circuit, in which current is diverted to one or the other branch of a superconducting loop to indicate a "1" or "0," has been shown by simulation to operate correctly when clocked at 62.5 GHz.
© (1988) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
D. A. Petersen, V. Nandakumar, E. Fang, D. F. Hebert, T. Van Duzer, "Flash-Type A/D Converters And Shift Registers", Proc. SPIE 0879, Sensing, Discrimination, and Signal Processing and Superconducting Materials and Intrumentation, (18 May 1988); doi: 10.1117/12.943981; https://doi.org/10.1117/12.943981
PROCEEDINGS
5 PAGES


SHARE
RELATED CONTENT

16-bit radix-4 continuous valued digit adder
Proceedings of SPIE (August 25 2006)
Very-low-noise switching-free CNN-based adder
Proceedings of SPIE (November 02 1999)
Subpicosecond dynamics of the switching process in Y Ba Cu...
Proceedings of SPIE (September 06 2000)

Back to Top