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20 April 1988 Efficient Bit-Level, Word-Level, And Block-Level Systolic Arrays For Matrix-Matrix Multiplication
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Proceedings Volume 0880, High Speed Computing; (1988) https://doi.org/10.1117/12.944043
Event: 1988 Los Angeles Symposium: O-E/LASE '88, 1988, Los Angeles, CA, United States
Abstract
This paper investigates the mapping of matrix-matrix multiplication onto bit level, word level and block level systolic arrays. Highly efficient and regular bit level, word level and block level systolic arrays are described. Efficiencies of many block level and word level systolic arrays reported in this paper approach 100%, three times the efficiencies of systolic arrays reported previously. Bit level systolic arrays reported in this paper require less computation time than than do bit level systolic arrays reported previously and, for special matrices, require less cells. Execution times of block level systolic algorithms on a sixty-four-element multiprocessor agree with theory.
© (1988) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
A J De Groot, S R Parker, and E M Johansson "Efficient Bit-Level, Word-Level, And Block-Level Systolic Arrays For Matrix-Matrix Multiplication", Proc. SPIE 0880, High Speed Computing, (20 April 1988); https://doi.org/10.1117/12.944043
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