25 October 1988 A High Performance Convolution Processor
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Proceedings Volume 1001, Visual Communications and Image Processing '88: Third in a Series; (1988); doi: 10.1117/12.968988
Event: Visual Communications and Image Processing III, 1988, Cambridge, MA, United States
This paper summarizes the design of a convolution processor card that is very low in cost, easy to use and most importantly, performs a 9x9 convolution in less than a second. Its high-performance is attributed to a VLSI systolic convolution cell which has been designed in our laboratories and to an efficient supporting data path architecture. The new Intel 82258 Advanced DMA Controller is used to perform each pixel transfer to and from the host computer's memory. Due to the DMA's software programmability, pictures of any size can be processed. The circuit is assembled on a 36 column MULTIBUS bus card and is installed on an Intel System 310 running iRMX 286 real-time multitasking operating system.
© (1988) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. F. Cote, C. Collet, D. D. Haule, A. S. Malowany, "A High Performance Convolution Processor", Proc. SPIE 1001, Visual Communications and Image Processing '88: Third in a Series, (25 October 1988); doi: 10.1117/12.968988; https://doi.org/10.1117/12.968988


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