For the realization of a videophone for use with the ISDN at data rates as low as 64 kbit/s there is a demand for powerful coding algorithms. In this paper new concepts for motion estimation and residual error coding, which are the most important parts of an hybrid codec, are introduced: Fast motion estimation algorithms to be found in many approaches, assume a monotonous behavior of the matching criterion with respect to the displacement. This assumption does not hold in reality. Therefore a hierarchical block matching motion estimation algorithm is introduced, which approaches the performance of a full search at a fraction of the computational cost. The algorithm combines a full search with a vector quantization as a first stage. In a second stage a full search with sub-pel accuracy is performed only over the small region corresponding to the codeword of the first stage. By motion compensated prediction the image of the residual error is obtained. A statistical analysis of this image shows that methods for data compression of natural images, e.g. transform coding, are not suitable for coding of the prediction error images. Instead, a structure coding scheme is proposed: The special signal statistics of the error signal allows a coarse quantization in the original domain. Dominant block types are coded using a quadtree. The scheme offers the additional advantage of easy implementation, unlike the DCT. Computer simulations show an improved picture quality even for strong scene movement without the usual artifacts, like blocking for example.