7 November 2016 Design and FPGA implementation of real-time automatic image enhancement algorithm
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Proceedings Volume 10141, Selected Papers of the Chinese Society for Optical Engineering Conferences held July 2016; 1014113 (2016) https://doi.org/10.1117/12.2251105
Event: Selected Proceedings of the Chinese Society for Optical Engineering Conferences held July 2016, 2016, Changchun, China
Abstract
In order to improve image processing quality and boost processing rate, this paper proposes an real-time automatic image enhancement algorithm. It is based on the histogram equalization algorithm and the piecewise linear enhancement algorithm, and it calculate the relationship of the histogram and the piecewise linear function by analyzing the histogram distribution for adaptive image enhancement. Furthermore, the corresponding FPGA processing modules are designed to implement the methods. Especially, the high-performance parallel pipelined technology and inner potential parallel processing ability of the modules are paid more attention to ensure the real-time processing ability of the complete system. The simulations and the experimentations show that the algorithm is based on the design and implementation of FPGA hardware circuit less cost on hardware, high real-time performance, the good processing performance in different sceneries. The algorithm can effectively improve the image quality, and would have wide prospect on imaging processing field.
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GuoWei Dong, GuoWei Dong, ZuoXun Hou, ZuoXun Hou, Qi Tang, Qi Tang, Zheng Pan, Zheng Pan, Xin Li, Xin Li, } "Design and FPGA implementation of real-time automatic image enhancement algorithm", Proc. SPIE 10141, Selected Papers of the Chinese Society for Optical Engineering Conferences held July 2016, 1014113 (7 November 2016); doi: 10.1117/12.2251105; https://doi.org/10.1117/12.2251105
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