31 March 2017 RLT uniformity improvement utilizing multi-scale NIL process simulation
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Abstract
Technologies for pattern fabrication using imprint process are being developed for various devices. Nanoimpirnt lithography (NIL) is an attractive and promising candidate for its pattern fidelity toward finer device fabrication without using double patterning. To apply smaller pattern size device, layout dependent hotspots becomes a significant issue, so design for manufacturing (DFM) flow considering imprint process has to be prepared. In this paper, focused on fine resist spread, RLT (Residual Layer Thickness) uniformity improvement utilizing simulation is demonstrated and resist drop compliance check flow is proposed
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Sachiko Kobayashi, Sachiko Kobayashi, Ryoichi Inanami, Ryoichi Inanami, Hirotaka Tsuda, Hirotaka Tsuda, Kazuhiro Washida, Kazuhiro Washida, Motofumi Komori, Motofumi Komori, Kyoji Yamashita, Kyoji Yamashita, Ji-Young Im, Ji-Young Im, Takuya Kono, Takuya Kono, Shimon Maeda, Shimon Maeda, } "RLT uniformity improvement utilizing multi-scale NIL process simulation", Proc. SPIE 10144, Emerging Patterning Technologies, 101440X (31 March 2017); doi: 10.1117/12.2258172; https://doi.org/10.1117/12.2258172
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