High-throughput electron-beam lithography (EBL) by character projection (CP) and variable-shaped beam (VSB) methods is a promising technique for low-to-medium volume device fabrication with regularly arranged layouts, such as standard-cell logics and memory arrays. However, non-VLSI applications like MEMS and MOEMS may not fully utilize the benefits of CP method due to their wide variety of layout figures including curved and oblique edges. In addition, the stepwise shapes that appear on such irregular edges by VSB exposure often result in intolerable edge roughness, which may degrade performances of the fabricated devices. In our former study, we proposed a general EBL methodology for such applications utilizing a combination of CP and VSB methods, and demonstrated its capabilities in electron beam (EB) shot reduction and edge-quality improvement by using a leading-edge EB exposure tool, ADVANTEST F7000S-VD02, and high-resolution Hydrogen Silsesquioxane resist. Both scanning electron microscope and atomic force microscope observations were used to analyze quality of the resist edge profiles to determine the influence of the control parameters used in the exposure-data preparation process. In this study, we carried out detailed analysis of the captured edge profiles utilizing Fourier analysis, and successfully distinguish the systematic undulation by the exposed CP character profiles from random roughness components. Such capability of precise edge-roughness analysis is useful to our EBL methodology to maintain both the line-edge quality and the exposure throughput by optimizing the control parameters in the layout data conversion.