21 March 2017 Silicon photonics and challenges for fabrication
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Abstract
Silicon photonics is rapidly becoming the key enabler for meeting the future data speed and volume required by the Internet of Things. A stable manufacturing process is needed to deliver cost and yield expectations to the technology marketplace. We present the key challenges and technical results from both 200mm and 300mm facilities for a silicon photonics fabrication process which includes monolithic integration with CMOS. This includes waveguide patterning, optical proximity correction for photonic devices, silicon thickness uniformity and thick material patterning for passive fiber to waveguide alignment. The device and process metrics show that the transfer of the silicon photonics process from 200mm to 300mm will provide a stable high volume manufacturing platform for silicon photonics designs.
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N. B. Feilchenfeld, N. B. Feilchenfeld, K. Nummy, K. Nummy, T. Barwicz, T. Barwicz, D. Gill, D. Gill, E. Kiewra, E. Kiewra, R. Leidy, R. Leidy, J. S. Orcutt, J. S. Orcutt, J. Rosenberg, J. Rosenberg, A. D. Stricker, A. D. Stricker, C. Whiting, C. Whiting, J. Ayala, J. Ayala, B. Cucci, B. Cucci, D. Dang, D. Dang, T. Doan, T. Doan, M. Ghosal, M. Ghosal, M. Khater, M. Khater, K. McLean, K. McLean, B. Porth, B. Porth, Z. Sowinski, Z. Sowinski, C. Willets, C. Willets, C. Xiong, C. Xiong, C. Yu, C. Yu, S. Yum, S. Yum, K. Giewont, K. Giewont, W. M. J. Green, W. M. J. Green, } "Silicon photonics and challenges for fabrication", Proc. SPIE 10149, Advanced Etch Technology for Nanopatterning VI, 101490D (21 March 2017); doi: 10.1117/12.2263472; https://doi.org/10.1117/12.2263472
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