In this paper we propose and demonstrate a low cost flexible self-aligned blocking strategy for critical metal layer patterning for 7nm and beyond from mask assembly to low –K dielectric etch. The integration is based on a 40nm pitch SADP flow with 2 cut masks compatible with either cut or block integration and employs dielectric films widely used in the back end of the line. As a consequence this approach is compatible with traditional etch, deposition and cleans tools that are optimized for dielectric etches. We will review the critical steps and selectivities required to enable this integration along with bench-marking of each integration option (cut vs. block).
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Angélique Raley, Nihar Mohanty, Xinghua Sun, Richard A. Farrell, Jeffrey T. Smith, Akiteru Ko, Andrew W. Metz, Peter Biolsi, Anton Devilliers, "Self-aligned blocking integration demonstration for critical sub-40nm pitch Mx level patterning," Proc. SPIE 10149, Advanced Etch Technology for Nanopatterning VI, 101490O (7 April 2017);