30 December 2016 Application of triple modular redundancy for soft error mitigation in 65-28 nm CMOS VLSI
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Proceedings Volume 10224, International Conference on Micro- and Nano-Electronics 2016; 1022417 (2016) https://doi.org/10.1117/12.2267143
Event: The International Conference on Micro- and Nano-Electronics 2016, 2016, Zvenigorod, Russian Federation
Abstract
We present a reasonable application of triple modular redundancy as an effective method of multiple soft error mitigation in 65-28 nm CMOS VLSI.
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A. P. Skorobogatov, A. P. Skorobogatov, } "Application of triple modular redundancy for soft error mitigation in 65-28 nm CMOS VLSI", Proc. SPIE 10224, International Conference on Micro- and Nano-Electronics 2016, 1022417 (30 December 2016); doi: 10.1117/12.2267143; https://doi.org/10.1117/12.2267143
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