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30 January 1996 Performance-optimized optical bidirectional backplane bus for multiprocessor systems
Ray T. Chen; Chunhe Zhao; Tchang-Hun Oh
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Proceedings Volume 10284, Optoelectronic Interconnects and Packaging: A Critical Review; 102840G (1996) https://doi.org/10.1117/12.229267
Event: Photonics West '96, 1996, San Jose, CA, United States
Abstract
We review the recent results on the design and implementation of the performance-optimized bidirectional optical backplane bus aimed at high speed multiprocessor systems. It employs an array of multiplexed holograms, in conjunction with a waveguiding plate within which cascaded fanouts are generated. Data transfer rate of 1.2 Gbit/sec at 1300 nm is demonstrated with a single bus line for a system composed of nine boards. Packaging-related issues and misalignment effects are addressed. Theoretical treatment to minimize fluctuations among the received powers at each board was carried out and the overall performance was optimized. We also introduce a hybrid optical backplane with multiple bus lines. The hybrid backplane maintains the same waveguiding structure, and exploits optoelectronic array devices. A new demonstration system is being implemented. The optical backplane that we developed is transparent to higher level bus protocols, thus can support standard backplane buses such as Futurebus+, Multibus II, and VMEbus.
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Ray T. Chen, Chunhe Zhao, and Tchang-Hun Oh "Performance-optimized optical bidirectional backplane bus for multiprocessor systems", Proc. SPIE 10284, Optoelectronic Interconnects and Packaging: A Critical Review, 102840G (30 January 1996); https://doi.org/10.1117/12.229267
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