29 August 2017 Amorphous silicon TFT pulse bias induced metastability
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Proceedings Volume 10313, Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics, and Imaging; 1031347 (2017) https://doi.org/10.1117/12.2283947
Event: Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics, and Imaging, 2002, Ottawa, Ontario, Canada
Abstract
Introduction Hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) are widely used as switching elements in liquid crystal displays (LCDs), imaging arrays and page-width printers that employ the active matrix addressing architecture. These devices, however, suffer from the electrical instability, when a prolonged voltage stress is applied to the TFT gate. This instability appears as a threshold voltage shift and degradation in subthreshold slope. Metastability of amorphous silicon TFTs under DC bias stress has been of interest in previous research, but less attention has been paid to the instabilities induced by pulse bias stress [5][6]. The study of pulse bias induced metastability of a-Si TFTs provides insight for designing circuits that are less sensitive or insensitive to instability. The results allow use of appropriate techniques to compensate for metastability, leading to less degradation from normal operation and longer lifetime for large area electronic systems. The paper presents results on pulse bias induced metastability of several a- Si:H inverted-staggered TFTs fabricated in-house at the University of Waterloo Microelectronics Laboratory using a 260°C fully wet-etch process.
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Kambiz Khodayari Moez, "Amorphous silicon TFT pulse bias induced metastability", Proc. SPIE 10313, Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics, and Imaging, 1031347 (29 August 2017); doi: 10.1117/12.2283947; https://doi.org/10.1117/12.2283947
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