Nanoscale process integration demands novel nanopatterning techniques in compliance with the requirements of next
generation devices. Conventionally, top-down subtractive (etch) or additive (deposition/lift-off) processes in conjunction
with various lithography techniques is employed to achieve film patterning, which become increasingly challenging due
to the ever-shrinking alignment requirements. To reduce the complexity burden of lithographic alignment in critical
fabrication steps, self-aligned processes such as selective deposition and selective etching might provide attractive
solutions. Selective atomic layer deposition (SALD) has attracted immense attention in recent years for self-aligned
accurate pattern placement with sub-nanometer thickness control. During the atomic layer deposition (ALD) process,
film nucleation is critically dependent on the surface chemistry of the substrate which makes it possible to achieve
selective-ALD (SALD) by chemically modifying the substrate surface. Local modification of substrate surface opens up
possibilities to achieve lateral control over film growth in addition to robust thickness control during ALD process.
SALD offers numerous advantages in nanoscale device fabrication such as reduction of the lithography steps required,
elimination of complicated etching processes, and minimization of expensive reagent use. In this work, we review our
recent SALD efforts using various inhibition layers resulting in promising self-aligned deposition solutions for metaloxide,
metal, and III-nitride thin films. We report a comprehensive investigation to select the most compatible inhibition
layer among poly(methylmethacrylate) (PMMA), polyvinylpyrrolidone (PVP), and ICP-polymerized fluorocarbon layers
for SALD of metal-oxide and metallic thin films. In addition, single-layer and multi-layered graphene layers are
explored as plasma-compatible inhibition layers for selective deposition of III-nitride materials. Extensive materials
characterization efforts are carried out to correlate the ALD recipe parameters with the selective deposition performance.
The materials and deposition recipes developed in this work overcome various challenges associated with previous
methods of SALD and provide alternative routes towards nano-patterning particularly for the sub-10 nm CMOS
technology nodes as well as for sensors, photovoltaics, materials for energy storage, catalysis, etc.