Presentation + Paper
31 August 2017 Contactless capacitive adiabatic logic
Yann Perrin, Ayrat Galisultanov, Hatem Samaali, Philippe Basset, Hervé Fanet, Gaël Pillonnet
Author Affiliations +
Abstract
CMOS technology allows a femto Joule energy dissipation per logic operation, if operated at optimal frequency and voltage. However, this value remains orders of magnitude above the theoretical limit predicted by Lan-dauer. In this work, we present a new paradigm for low power computation, based on variable capacitors. Such components can be implemented with existing MEMS technologies. We show how a smooth capacitance modu-lation allows an energy-efficient transfer of information through the circuit. By removing electrical contacts, our method limits the current leakages and the associated energy loss. Therefore, capacitive logic must be able to achieve extremely low power dissipation when driven adiabatically. Contactless capacitive logic also promises a better reliability than systems based on MEMS nanorelays.
Conference Presentation
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yann Perrin, Ayrat Galisultanov, Hatem Samaali, Philippe Basset, Hervé Fanet, and Gaël Pillonnet "Contactless capacitive adiabatic logic", Proc. SPIE 10354, Nanoengineering: Fabrication, Properties, Optics, and Devices XIV, 103540A (31 August 2017); https://doi.org/10.1117/12.2275211
Lens.org Logo
CITATIONS
Cited by 2 scholarly publications.
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Logic

Microelectromechanical systems

Capacitors

Logic devices

Capacitance

Transistors

Energy efficiency

RELATED CONTENT

Simple opto-immittance converters
Proceedings of SPIE (December 12 2022)
The research on several innovative comparators
Proceedings of SPIE (July 15 2022)
The application of memristor in combinational logic circuit
Proceedings of SPIE (November 02 2023)
Research of optoimmittance logical elements
Proceedings of SPIE (November 06 2019)
Sub 5.5 FO4 delay CMOS 64 bit domino threshold logic...
Proceedings of SPIE (March 30 2004)

Back to Top